Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753493Ab1BGO7E (ORCPT ); Mon, 7 Feb 2011 09:59:04 -0500 Received: from mail-ww0-f44.google.com ([74.125.82.44]:56228 "EHLO mail-ww0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753172Ab1BGO7C (ORCPT ); Mon, 7 Feb 2011 09:59:02 -0500 Date: Mon, 7 Feb 2011 14:58:58 +0000 From: Jamie Iles To: John Linn Cc: Jamie Iles , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux@arm.linux.org.uk, catalin.marinas@arm.com, glikely@secretlab.ca, Kiran Sutariya Subject: Re: [PATCH 3/4] ARM: Xilinx: Adding timer support to the platform Message-ID: <20110207145858.GC24893@pulham.picochip.com> References: <1296922637-24662-1-git-send-email-john.linn@xilinx.com> <1296922637-24662-2-git-send-email-john.linn@xilinx.com> <1296922637-24662-3-git-send-email-john.linn@xilinx.com> <66f1ca90-76f5-4571-b10e-8b79f62e5275@VA3EHSMHS020.ehs.local> <20110206010343.GB5563@pulham.picochip.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2130 Lines: 57 On Mon, Feb 07, 2011 at 07:16:01AM -0700, John Linn wrote: > > -----Original Message----- > > From: Jamie Iles [mailto:jamie@jamieiles.com] > > Sent: Saturday, February 05, 2011 6:04 PM > > To: John Linn > > Cc: linux-arm-kernel@lists.infradead.org; > linux-kernel@vger.kernel.org; linux@arm.linux.org.uk; > > catalin.marinas@arm.com; glikely@secretlab.ca; Kiran Sutariya > > Subject: Re: [PATCH 3/4] ARM: Xilinx: Adding timer support to the > platform > > > > Hi John, > > > > A couple more nitpicks. > > > > Jamie > > > > On Sat, Feb 05, 2011 at 09:17:16AM -0700, John Linn wrote: > > > +static irqreturn_t xttcpss_clock_event_interrupt(int irq, void > *dev_id) > > > +{ > > > + struct clock_event_device *evt = &xttcpss_clockevent; > > > + struct xttcpss_timer *timer = dev_id; > > > + u32 ctrl_reg; > > > + > > > + /* Acknowledge the interrupt and call event handler */ > > > + xttcpss_write(timer->base_addr + XTTCPSS_ISR_OFFSET, > > > + xttcpss_read(timer->base_addr + XTTCPSS_ISR_OFFSET)); > > > + > > > + if (timer->mode == CLOCK_EVT_MODE_ONESHOT) { > > > + > > > + /* Disable the counter as it would keep running. */ > > > + ctrl_reg = xttcpss_read(timer->base_addr + > > > + XTTCPSS_CNT_CNTRL_OFFSET); > > > + ctrl_reg |= ~(XTTCPSS_CNT_CNTRL_ENABLE_MASK); > > > > The clock events framework should reprogram the next event so you > don't > > actually need to disable the timer here. Once the event handler has > > been called the timer will be reenabled with a new period, and as > we're > > running with interrupts disabled here we don't need to stop the timer. > > > > What about if there's not another event to be started? Then the clockevents code can set the mode to CLOCK_EVT_MODE_SHUTDOWN and this should disable the timer. For NOHZ, AFAICT the clockevents/tick code will make sure that the next tick always falls within your max_delta_ns. Jamie -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/