Message-ID: <4D5C93B6.5020900@zytor.com>
Date: Wed, 16 Feb 2011 19:19:18 -0800
From: "H. Peter Anvin" <hpa@zytor.com>
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To: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
CC: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>,
        Will Newton <will.newton@gmail.com>,
        Steven Rostedt <rostedt@goodmis.org>,
        Will Simoneau <simoneau@ele.uri.edu>,
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        benh@kernel.crashing.org, 2nddept-manager@sdl.hitachi.co.jp
Subject: Re: [PATCH 0/2] jump label: 2.6.38 updates
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On 02/16/2011 05:55 PM, Masami Hiramatsu wrote:
> 
> Hmm, I think that is miss-coding ll/sc.
> If I understand correctly, usually cache invalidation should be done
> right before storing value, as MSI protocol does.
> (or, sc should atomically invalidate the cache line)
> 

I suspect in this case one should flush the cache line before ll (a
cache flush will typically invalidate the ll/sc link.)

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

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