Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754763Ab1BTS6j (ORCPT ); Sun, 20 Feb 2011 13:58:39 -0500 Received: from earthlight.etchedpixels.co.uk ([81.2.110.250]:54911 "EHLO www.etchedpixels.co.uk" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754576Ab1BTS6i (ORCPT ); Sun, 20 Feb 2011 13:58:38 -0500 Date: Sun, 20 Feb 2011 18:59:58 +0000 From: Alan Cox To: Sergei Shtylyov Cc: Bartlomiej Zolnierkiewicz , linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 02/20] ata_piix: unify code for programming PIO and MWDMA timings Message-ID: <20110220185958.364df4cc@lxorguk.ukuu.org.uk> In-Reply-To: <4D6118DC.80505@ru.mvista.com> References: <20110208122314.19110.4092.sendpatchset@linux-mhg7.site> <20110208122346.19110.8441.sendpatchset@linux-mhg7.site> <4D6118DC.80505@ru.mvista.com> X-Mailer: Claws Mail 3.7.8 (GTK+ 2.22.0; x86_64-redhat-linux-gnu) Face: iVBORw0KGgoAAAANSUhEUgAAADAAAAAwBAMAAAClLOS0AAAAFVBMVEWysKsSBQMIAwIZCwj///8wIhxoRDXH9QHCAAABeUlEQVQ4jaXTvW7DIBAAYCQTzz2hdq+rdg494ZmBeE5KYHZjm/d/hJ6NfzBJpp5kRb5PHJwvMPMk2L9As5Y9AmYRBL+HAyJKeOU5aHRhsAAvORQ+UEgAvgddj/lwAXndw2laEDqA4x6KEBhjYRCg9tBFCOuJFxg2OKegbWjbsRTk8PPhKPD7HcRxB7cqhgBRp9Dcqs+B8v4CQvFdqeot3Kov6hBUn0AJitrzY+sgUuiA8i0r7+B3AfqKcN6t8M6HtqQ+AOoELCikgQSbgabKaJW3kn5lBs47JSGDhhLKDUh1UMipwwinMYPTBuIBjEclSaGZUk9hDlTb5sUTYN2SFFQuPe4Gox1X0FZOufjgBiV1Vls7b+GvK3SU4wfmcGo9rPPQzgIabfj4TYQo15k3bTHX9RIw/kniir5YbtJF4jkFG+dsDK1IgE413zAthU/vR2HVMmFUPIHTvF6jWCpFaGw/A3qWgnbxpSm9MSmY5b3pM1gvNc/gQfwBsGwF0VCtxZgAAAAASUVORK5CYII= Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 765 Lines: 19 > > + if (ata_pio_need_iordy(adev) || use_mwdma) > > control |= 2; /* IE enable */ > > Why IORDY is enabled for MWDMA has always been beyond me... I understand > that the stupid Intel docs are to be blamed here. I fail to see whats stupid about the docs ? The same timing register set is used for MWDMA and PIO cycles in MWDMA tuned modes (eg ATAPI). Thus the controller needs to be in an MWDMA mode whose timings are compatible with the PIO timing and we want IORDY in use for the PIO transfer parts. Alan -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/