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Subject: Re: [PATCH v4] net: add Faraday FTMAC100 10/100 Ethernet driver
From: Eric Dumazet <eric.dumazet@gmail.com>
To: Po-Yu Chuang <ratbert.chuang@gmail.com>
Cc: David Miller <davem@davemloft.net>, mirqus@gmail.com,
        netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
        bhutchings@solarflare.com, joe@perches.com, dilinger@queued.net,
        ratbert@faraday-tech.com
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	 <AANLkTimorcNAEbSpuE_dUXKuOBZDcDcGSJ2cGefniThc@mail.gmail.com>
	 <20110223.235129.02262510.davem@davemloft.net>
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Date: Thu, 24 Feb 2011 09:22:41 +0100
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Le jeudi 24 février 2011 à 16:07 +0800, Po-Yu Chuang a écrit :
> Hi David,
> 
> On Thu, Feb 24, 2011 at 3:51 PM, David Miller <davem@davemloft.net> wrote:
> > From: Po-Yu Chuang <ratbert.chuang@gmail.com>
> > Date: Thu, 24 Feb 2011 15:27:55 +0800
> >
> >> I guess the problem is because a HW restriction that the rx buffer must be
> >> 64 bits aligned. Since I cannot make rx buffer starts at offset 2 bytes, the
> >> IP header, TCP header and data are not 4 bytes aligned. The performance
> >> drops drastically.
> >
> > I cannot believe that after 20 years of commodity ethernet networking
> > chips were first designed, people are still designing hardware that
> > doesn't do this right.
> 
> Ha ha...
> Well, this restriction was removed in the later IPs of our company. :-p
> 
> >
> > Just emit garbage bytes into the sub-word alignment padding if the chip
> > wants to word align it's DMA writes.
> 
> Not sure what do you mean. The problem is that HW does not accept a
> base address of RX buffer which is not 8 bytes aligned.

I still dont understand the problem, maybe you should post your work as
RFC

Why not using for the first part the skb buffer (eventually copy the
first 128 bytes to get aligned IP/TCP header), and add frags for
following parts ?


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