Message-Id: <1bdc18$jo39ki@fmsmga002.fm.intel.com>
Date: Tue, 01 Mar 2011 22:32:24 +0000
To: Jan Niehusmann <jan@gondor.com>, intel-gfx@lists.freedesktop.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH] drm/i915: fix memory corruption with GM965 and >4GB RAM
References: <20110223233022.GA3439@x61s.reliablesolutions.de> <20110225123056.GA3759@x61s.reliablesolutions.de> <b9dded$i2gkhr@orsmga002.jf.intel.com> <20110225211646.GA6837@x61s.reliablesolutions.de> <b9dded$i2hik6@orsmga002.jf.intel.com> <20110225230527.GC3601@viiv.ffwll.ch> <20110301222416.GA3526@x61s.reliablesolutions.de>
From: Chris Wilson <chris@chris-wilson.co.uk>
In-Reply-To: <20110301222416.GA3526@x61s.reliablesolutions.de>
Sender: linux-kernel-owner@vger.kernel.org
Content-Length: 1148
Lines: 25

On Tue, 1 Mar 2011 23:24:16 +0100, Jan Niehusmann <jan@gondor.com> wrote:
> Indeed, setting dma_alloc_coherent should be sufficient, AFAIKT. After
> all, only the HWS seems to be affected, which is allocated with
> drm_pci_alloc, which in turn uses dma_alloc_coherent.
> 
> I just tried the patch below, it also works for me (as expected). Added
> the comment because otherwise it wouldn't be obvious why the mask gets
> set to 32 bit.
> 
> What I don't know is if really only Broadwater and Crestline chips are
> affected. The tests were done with a Crestline one. But I think it's a
> fair guess that the bug would have been noticed earlier if more recent
> chips were affected, as >4GB RAM have become much more common since then.

The later chips do not use a physical address for the hardware status
page. The patch looks good, thanks.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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