Date: Sat, 26 Mar 2011 14:49:56 -0500 (CDT)
From: Christoph Lameter <cl@linux.com>
To: Eric Dumazet <eric.dumazet@gmail.com>
cc: Ingo Molnar <mingo@elte.hu>, Pekka Enberg <penberg@kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>, torvalds@linux-foundation.org,
        akpm@linux-foundation.org, tj@kernel.org, npiggin@kernel.dk,
        rientjes@google.com, linux-kernel@vger.kernel.org, linux-mm@kvack.org
Subject: Re: [PATCH] slub: Disable the lockless allocator
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On Sat, 26 Mar 2011, Christoph Lameter wrote:

> Tejun: Whats going on there? I should be getting offsets into the per cpu
> area and not kernel addresses.

Its a UP kernel running on dual Athlon. So its okay ... Argh.... The
following patch fixes it by using the fallback code for cmpxchg_double:


Subject: per_cpu: Fixup cmpxchg_double for !SMP

cmpxchg_double should only be provided for SMP. In the UP case
the GS register is not defined and the function will fail.

Signed-off-by: Christoph Lameter <cl@linux.com>

Index: linux-2.6/arch/x86/include/asm/percpu.h
===================================================================
--- linux-2.6.orig/arch/x86/include/asm/percpu.h	2011-03-26 11:11:19.175244998 -0500
+++ linux-2.6/arch/x86/include/asm/percpu.h	2011-03-26 14:45:29.254088998 -0500
@@ -507,6 +507,7 @@
  * it in software.  The address used in the cmpxchg16 instruction must be
  * aligned to a 16 byte boundary.
  */
+#ifdef CONFIG_SMP
 #define percpu_cmpxchg16b_double(pcp1, o1, o2, n1, n2)			\
 ({									\
 	char __ret;							\
@@ -529,6 +530,7 @@
 #define irqsafe_cpu_cmpxchg_double_8(pcp1, pcp2, o1, o2, n1, n2)	percpu_cmpxchg16b_double(pcp1, o1, o2, n1, n2)

 #endif
+#endif

 /* This is not atomic against other CPUs -- CPU preemption needs to be off */
 #define x86_test_and_clear_bit_percpu(bit, var)				\

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