Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754404Ab1EHMz0 (ORCPT ); Sun, 8 May 2011 08:55:26 -0400 Received: from service87.mimecast.com ([94.185.240.25]:42738 "HELO service87.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1753167Ab1EHMv4 (ORCPT ); Sun, 8 May 2011 08:51:56 -0400 From: Catalin Marinas To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Russell King - ARM Linux , Will Deacon Subject: [PATCH v5 02/19] ARM: LPAE: add ISBs around MMU enabling code Date: Sun, 8 May 2011 13:51:21 +0100 Message-Id: <1304859098-10760-3-git-send-email-catalin.marinas@arm.com> X-Mailer: git-send-email 1.7.4.2.g597a6 In-Reply-To: <1304859098-10760-1-git-send-email-catalin.marinas@arm.com> References: <1304859098-10760-1-git-send-email-catalin.marinas@arm.com> X-OriginalArrivalTime: 08 May 2011 12:51:48.0319 (UTC) FILETIME=[B193B6F0:01CC0D7E] X-MC-Unique: 111050813515302301 Content-Type: text/plain; charset=WINDOWS-1252 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id p48CteWe020111 Content-Length: 1720 Lines: 60 From: Will Deacon Before we enable the MMU, we must ensure that the TTBR registers contain sane values. After the MMU has been enabled, we jump to the *virtual* address of the following function, so we also need to ensure that the SCTLR write has taken effect. This patch adds ISB instructions around the SCTLR write to ensure the visibility of the above. Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas --- arch/arm/include/asm/assembler.h | 11 +++++++++++ arch/arm/kernel/head.S | 2 ++ 2 files changed, 13 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index bc2d2d7..2bcc456 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -184,6 +184,17 @@ #endif /* + * Instruction barrier + */ + .macro instr_sync +#if __LINUX_ARM_ARCH__ >= 7 + isb +#elif __LINUX_ARM_ARCH__ == 6 + mcr p15, 0, r0, c7, c5, 4 +#endif + .endm + +/* * SMP data memory barrier */ .macro smp_dmb mode diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index c9173cf..ea8fae7 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -385,8 +385,10 @@ ENDPROC(__enable_mmu) .align 5 __turn_mmu_on: mov r0, r0 + instr_sync mcr p15, 0, r0, c1, c0, 0 @ write control reg mrc p15, 0, r3, c0, c0, 0 @ read id reg + instr_sync mov r3, r3 mov r3, r13 mov pc, r3 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/