Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934238Ab1ESSP4 (ORCPT ); Thu, 19 May 2011 14:15:56 -0400 Received: from mx3.mail.elte.hu ([157.181.1.138]:51499 "EHLO mx3.mail.elte.hu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934060Ab1ESSPv (ORCPT ); Thu, 19 May 2011 14:15:51 -0400 Date: Thu, 19 May 2011 20:15:00 +0200 From: Ingo Molnar To: Benjamin Herrenschmidt , Thomas Gleixner , "H. Peter Anvin" Cc: Roland Dreier , Milton Miller , Hitoshi Mitake , Sam Ravnborg , Ingo Molnar , "Desai, Kashyap" , "Prakash, Sathya" , James Bottomley , Matthew Wilcox , linux scsi dev , "paulus@samba.org" , linux powerpc dev , linux pci , linux kernel , linux-arch Subject: Re: [PATCH 1/3] mpt2sas: remove the use of writeq, since writeq is not atomic Message-ID: <20110519181500.GF6139@elte.hu> References: <1305616571.6008.23.camel@mulgrave.site> <20110518041551.GL15227@parisc-linux.org> <1305692584.2580.3.camel@mulgrave.site> <1305702010.2781.33.camel@pasglop> <4565AEA676113A449269C2F3A549520F80B66280@cosmail03.lsi.com> <1305783242.7481.42.camel@pasglop> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1305783242.7481.42.camel@pasglop> User-Agent: Mutt/1.5.20 (2009-08-17) X-ELTE-SpamScore: -2.0 X-ELTE-SpamLevel: X-ELTE-SpamCheck: no X-ELTE-SpamVersion: ELTE 2.0 X-ELTE-SpamCheck-Details: score=-2.0 required=5.9 tests=BAYES_00 autolearn=no SpamAssassin version=3.3.1 -2.0 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1653 Lines: 40 * Benjamin Herrenschmidt wrote: > On Wed, 2011-05-18 at 21:16 -0700, Roland Dreier wrote: > > On Wed, May 18, 2011 at 11:31 AM, Milton Miller wrote: > > > So the real question should be why is x86-32 supplying a broken writeq > > > instead of letting drivers work out what to do it when needed? > > > > Sounds a lot like what I was asking a couple of years ago :) > > http://lkml.org/lkml/2009/4/19/164 > > > > But Ingo insisted that non-atomic writeq would be fine: > > http://lkml.org/lkml/2009/4/19/167 > > Yuck... Ingo, I think that was very wrong. > > Those are for MMIO, which must almost ALWAYS know precisely what the > resulting access size is going to be. It's not even about atomicity > between multiple CPUs. I have seen plenty of HW for which a 64-bit > access to a register is -not- equivalent to two 32-bit ones. In fact, in > some case, you can get the side effects twice ... or none at all. > > The only case where you can be lax is when you explicitely know that > there is no side effects -and- the HW cope with different access sizes. > This is not the general case and drivers need at the very least a way to > know what the behaviour will be. Ok, that's pretty convincing. Unless hpa or tglx disagrees with reverting this, could any of you send a patch with a proper changelog etc. that applies cleanly to v2.6.39? Thanks, Ingo -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/