Message-ID: <4DDD0D25.8010102@cam.ac.uk>
Date: Wed, 25 May 2011 15:07:33 +0100
From: Jonathan Cameron <jic23@cam.ac.uk>
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To: Anatolij Gustschin <agust@denx.de>
CC: linux-kernel@vger.kernel.org, akpm@linux-foundation.org, dzu@denx.de
Subject: Re: [PATCH 1/2] misc/eeprom: add driver for 93xx46 EEPROMs over GPIO
References: <1306252963-20746-1-git-send-email-agust@denx.de>	<4DDCCC82.90604@cam.ac.uk> <20110525153527.2811487d@wker>
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On 05/25/11 14:35, Anatolij Gustschin wrote:
> On Wed, 25 May 2011 10:31:46 +0100
> Jonathan Cameron <jic23@cam.ac.uk> wrote:
> 
>> On 05/24/11 17:02, Anatolij Gustschin wrote:
>>> 93xx46 EEPROMs can be connected using GPIO lines. Add a generic
>>> 93xx46 EEPROM driver using common GPIO API for such configurations.
>>> A platform is supposed to register appropriate 93xx46 gpio device
>>> providing GPIO interface description and using this driver
>>> read/write/erase access to the EEPROM chip can be easily done
>>> over sysfs files.
>> Could you explain why this makes more sense than an spi driver and
>> use of spi_gpio ?
>>
>> It's microwire compatible according to random google provided datasheet,
>> which iirc is a particular form of spi (half duplex, spi mode 0 according
>> to wikipedia)
>>
>> That would give us a more generally useful driver.
> 
> I thought about using spi_gpio first, then I decided to
> do it in an independent driver since on the hardware the
> driver was written for we additionally need to control
> logic to hold pixel link chips in reset when eeprom access
> is performed. Putting appropriate hacks to spi_gpio driver 
> didn't seem to be right approach. Controlling this logic
> from user space is error-prone, too.
Why would you need to put hacks in the spi bus driver?

Surely they would still be in your eeprom driver.
Basically hold the pin down - do spi transfer - raise it again

Might need some callbacks to platform data (From the eeprom driver)
to deal with this case...
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