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Date: Wed, 01 Jun 2011 22:58:08 +0100
From: Daniel Haid <d.haid@gogi.tv>
To: <linux-kernel@vger.kernel.org>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
        Andi Kleen <andi@firstfloor.org>
Subject: Re: Question about iommu on =?UTF-8?Q?x=38=36=5F=36=34=20and=20ra?=
 =?UTF-8?Q?deon=20driver=2E?=
In-Reply-To: <21491fcfb013e21177140326efc0ee66@admin.gogi.tv>
References: <20110525125752.GB3467@dumpdata.com>
 <dfd8bfd19ba1fb77d6448bff97123e13@admin.gogi.tv>
 <20110527155507.GB11273@dumpdata.com>
 <9e26ea71798d10a3f900c777b71ff485@admin.gogi.tv>
 <20110531134519.GC14641@dumpdata.com>
 <59be1730ec1660abeb7b4dc584510d34@admin.gogi.tv>
 <20110531160221.GA31659@dumpdata.com>
 <0a8cb4bcad7fcf091a6bbe158323bba0@admin.gogi.tv>
 <20110531190412.GA21245@dumpdata.com>
 <d0ce6a4ba6092a1a9ef0f1e8f3cac9c9@admin.gogi.tv>
 <20110601132444.GA4081@dumpdata.com>
 <21491fcfb013e21177140326efc0ee66@admin.gogi.tv>
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 I have also found out the following. In

 line 741 of drivers/gpu/drm/radeon/radeon_device.c

 there is a comment "PCIE - can handle 40-bits." -
 I have a PCIE card - and then need_dma32 is not set.

 So if I read it correctly the ttm allocation
 routines will allocate memory over 4GB.

 But if PCIE can handle 40 bits, why does swiotlb
 give out a bounce buffer to the radeon driver at all?

 Shouldn't

 (dma_capable(dev, dev_addr, size) && !swiotlb_force)

 on line 672 of lib/swiotlb.c be true?


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