Date: Tue, 28 Jun 2011 12:32:06 -0400 (EDT)
From: Vince Weaver <vweaver1@eecs.utk.edu>
To: Robert Richter <robert.richter@amd.com>
cc: Peter Zijlstra <a.p.zijlstra@chello.nl>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Paul Mackerras <paulus@samba.org>, Ingo Molnar <mingo@elte.hu>,
        Arnaldo Carvalho de Melo <acme@ghostprotocols.net>,
        Stephane Eranian <eranian@google.com>,
        "Przywara, Andre" <Andre.Przywara@amd.com>
Subject: Re: [patch] perf_events: even more wrong events for AMD fam10h
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On Mon, 27 Jun 2011, Robert Richter wrote:

> 
> do you think it is worth to introduce l1-dcache-access?

It could be useful to have.  On PAPI we have the equivelent
PAPI_L1_DCA and all AMD processors support it, as do all
Intel except atom.  POWER does not though, at least not
directly.

Vince
vweaver1@eecs.utk.edu
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