Message-ID: <1329491549.2293.275.camel@twins>
Subject: RE: perf, x86: Disable PEBS on SandyBridge chips
From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: Maarten Lankhorst <m.b.lankhorst@gmail.com>
Cc: x86@kernel.org, LKML <linux-kernel@vger.kernel.org>,
        "H. Peter Anvin" <hpa@linux.intel.com>,
        Stephane Eranian <eranian@google.com>
Date: Fri, 17 Feb 2012 16:12:29 +0100
In-Reply-To: <4F3E4A7A.1070708@gmail.com>
References: <4F3E4A7A.1070708@gmail.com>
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On Fri, 2012-02-17 at 13:39 +0100, Maarten Lankhorst wrote:
> Hey Peter,
> 
> Why is PEBS disabled? If I look at the intel_clovertown_quirks I can see 
> why it's disabled for that cpu, but the sandy bridge one lacks any kind 
> of clarification or information on why, or how I can learn more.

hpa, could you get the official Intel answer on this?
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