Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752425Ab2BTA1h (ORCPT ); Sun, 19 Feb 2012 19:27:37 -0500 Received: from mail-vw0-f46.google.com ([209.85.212.46]:56753 "EHLO mail-vw0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751840Ab2BTA1g convert rfc822-to-8bit (ORCPT ); Sun, 19 Feb 2012 19:27:36 -0500 Authentication-Results: mr.google.com; spf=pass (google.com: domain of john.williams@petalogix.com designates 10.220.157.75 as permitted sender) smtp.mail=john.williams@petalogix.com MIME-Version: 1.0 In-Reply-To: <1329664319-3128-2-git-send-email-geert@linux-m68k.org> References: <1329664319-3128-1-git-send-email-geert@linux-m68k.org> <1329664319-3128-2-git-send-email-geert@linux-m68k.org> From: John Williams Date: Mon, 20 Feb 2012 10:27:14 +1000 Message-ID: Subject: Re: [microblaze-linux] [PATCH 2/5] microblaze: s/#if[!] CONFIG/#if[n]def CONFIG/ To: Geert Uytterhoeven Cc: Jiri Kosina , microblaze-uclinux@itee.uq.edu.au, linux-kernel@vger.kernel.org Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2508 Lines: 64 Hi Geert, NACK - please see comments below On Mon, Feb 20, 2012 at 1:11 AM, Geert Uytterhoeven wrote: > Signed-off-by: Geert Uytterhoeven > Cc: Michal Simek > Cc: microblaze-uclinux@itee.uq.edu.au > --- > ?arch/microblaze/include/asm/exceptions.h | ? ?2 +- > ?arch/microblaze/include/asm/irqflags.h ? | ? ?2 +- > ?arch/microblaze/kernel/entry-nommu.S ? ? | ? ?2 +- > ?arch/microblaze/kernel/entry.S ? ? ? ? ? | ? ?4 ++-- > ?arch/microblaze/kernel/setup.c ? ? ? ? ? | ? ?4 ++-- > ?5 files changed, 7 insertions(+), 7 deletions(-) > > diff --git a/arch/microblaze/include/asm/exceptions.h b/arch/microblaze/include/asm/exceptions.h > index e6a8dde..48c197b 100644 > --- a/arch/microblaze/include/asm/exceptions.h > +++ b/arch/microblaze/include/asm/exceptions.h > @@ -25,7 +25,7 @@ > ?/* Define MSR enable bit for HW exceptions */ > ?#define HWEX_MSR_BIT (1 << 8) > > -#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR > +#ifdef CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR We actually care about the value of this one - it is always defined, but is either 0 or 1 depending upon the presence or absence of this feature in the target CPU. These CPU feature-related configs are defined in arch/microblaze/platform/generic/Kconfig.auto http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=arch/microblaze/platform/generic/Kconfig.auto;h=25a6f019e94d5d9a1c884dfef9e906435685f980;hb=HEAD not as bools, but as integers. Kconfig.auto is actually a placeholder for a design file which is emitted from the MicroBlaze CPU / SoC design tool flow and copied into place by the user. In my view these should remain integers rather than booleans for a couple of reasons: * breakage for all current users * MicroBlaze is an evolving architecture, there are other cases of seemingly boolean HW parametesr growing to become integers, such as the USE_FPU option. Once upon a time it was yes/no, now there's 2 different flavours of FPU as well as 'none'. MSR is just as likely to change in future. > -#if CONFIG_MANUAL_RESET_VECTOR > +#ifdef CONFIG_MANUAL_RESET_VECTOR This guy is also always defined (Kconfig 'hex' type), we just need to do something different for a non-zero value. Regards, John -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/