Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755797Ab2BVE0i (ORCPT ); Tue, 21 Feb 2012 23:26:38 -0500 Received: from mail-pw0-f46.google.com ([209.85.160.46]:65281 "EHLO mail-pw0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752249Ab2BVE0g (ORCPT ); Tue, 21 Feb 2012 23:26:36 -0500 MIME-Version: 1.0 In-Reply-To: <4F4462B8.6030607@linux.intel.com> References: <4F4462B8.6030607@linux.intel.com> Date: Wed, 22 Feb 2012 13:26:36 +0900 Message-ID: Subject: Re: [PATCH 0/4] pch_uart: Cleanups, board quirks, and user uartclk parameter From: Tomoya MORINAGA To: Darren Hart Cc: Linux Kernel Mailing List , Feng Tang , Greg Kroah-Hartman , Alan Cox , linux-serial@vger.kernel.org Content-Type: text/plain; charset=ISO-2022-JP Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 987 Lines: 23 2012年2月22日12:36 Darren Hart : > This patch series allows for a functional early serial console as well > as using the UART after boot. It leaves the CM-iTC board alone. So this > seems to enable all use cases, while forcing 192MHz breaks the FRI2 > early serial console. I don't see an advantage to that approach other > than the obviously simpler code (which is nice, but should not trump > functionality). Your quark "Fish River Island II" is OK. My concern is default uart_clock remains 1.8432 MHz. Like I said the advantage before, I think this should be 192MHz not 1.8432 MHz. Or do you have any reason 1.8432 MHz should be set as PCH_UART default clock. thanks --- ROHM Co., Ltd. tomoya -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/