From: Philippe =?ISO-8859-1?Q?R=E9tornaz?= <philippe.retornaz@epfl.ch>
To: marc@cpdesign.com.au
Cc: Fabio Estevam <festevam@gmail.com>, Shawn Guo <shawn.guo@freescale.com>,
        Uwe =?ISO-8859-1?Q?Kleine=2DK=F6nig?= 
	<u.kleine-koenig@pengutronix.de>,
        Mark Brown <broonie@opensource.wolfsonmicro.com>,
        Samuel Ortiz <sameo@linux.intel.com>,
        Sascha Hauer <kernel@pengutronix.de>,
        linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: mc13xxx-core: kernel hangs after 'regmap_read'
Date: Thu, 24 May 2012 18:16:50 +0200
Message-ID: <5844466.kI7qR0Os9A@laptop>
Organization: EPFL - STI - LSRO1
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> > Still reading 0x810 for all registers (0x810000 is the value of
> > register 0 , btw).
> 
> This could mean that all the registers are being sent as 0 and the value is
> shifted by 12 bits. (which is a bit weird). It's also a strange that Shawn's
> board seems to work.
> 
> Do you have any other devices on that SPI that you can verify are working
> correctly? (you said it worked from the bootloader, I'm running out of
> ideas... :| )


Well, I think I found out why it's not working on mc13783.
With regmap, each transfert is done with 8bits words. The SPI hardware assert 
the SS signal only during 8 bits "register" transfert then deassert the SS. 
Then the SS is asserted and 24bits (3 bytes) are transfered (datas).
This clearly violate the datasheet which say SS must be asserted for the 
*whole* transfert: register + data.

This is why the old code used a 32bits word transfert, it ensured that the SPI 
hardware was keeping SS asserted without interruptions.

Is there any way to tell regmap to use 32bits transfert with the following 
configuration (or doing it in a single shot 4x8bits):
To read register 0x42 we need to "write" to SPI:

0x42 << 24

and the mc13783 will answer immediatly in the low-24 bits of the _same_ spi 
exchange.

to write register 0x42 we need to "write" to SPI:

(0x80 | 0x42) << 24  | data

I have an oscilloscope screenshot of a transfert if needed.

Regards,

Philippe


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