Date: Thu, 31 May 2012 12:05:18 +0300
From: Peter De Schrijver <pdeschrijver@nvidia.com>
To: Felipe Balbi <balbi@ti.com>
CC: Stephen Boyd <sboyd@codeaurora.org>, Russell King <linux@arm.linux.org.uk>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
        Mike Turquette <mturquette@ti.com>
Subject: Re: [RFC PATCH] clk: add extension API
Message-ID: <20120531090518.GR8026@tbergstrom-lnx.Nvidia.com>
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 <20120531075125.GL8026@tbergstrom-lnx.Nvidia.com>
 <20120531081841.GG5377@arwen.pp.htv.fi>
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> 
> What if a module needs two clocks and you drive the reset on both of the
> clocks ? What would happen ?
> 

Only 'leave clocks' have this reset method and a module can only have 1 of
them.

> > but then we would have the keep a list of IDs (1 per module) which the drivers
> > can use to call some tegra reset function which would in the end use registers
> > in the same memory area to cause a reset. (the registers controlling
> > modulereset are interleaved with those controlling the enable/disable of the
> > main moduleclock and bitpositions are identical)
> 
> Well, under a generic device-level API, you could just call an internal
> clk_reset() function because you know which clocks feed into which
> devices anyway. It could look something like:
> 
> on Tegra:
> 
> device_reset(dev)
> 	-> dev_pm_domain->reset()
> 		-> tegra_periph_reset()
> 

These methods are also needed internally by the powergating code.

> on OMAP:
> 
> device_reset(dev)
> 	-> dev_pm_domain->reset()
> 		-> omap_hwmod_reset()
> 
> 
> btw:
> 
> tegra_periph_reset(....)
> {
> 	tegra_periph_reset_assert(...);
> 	udelay(2);
> 	tegra_periph_reset_deassert(...);
> }

which uses the clockframework currently.

Cheers,

Peter.
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