Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753579Ab2FEXN7 (ORCPT ); Tue, 5 Jun 2012 19:13:59 -0400 Received: from one.firstfloor.org ([213.235.205.2]:54029 "EHLO one.firstfloor.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751187Ab2FEXN5 (ORCPT ); Tue, 5 Jun 2012 19:13:57 -0400 Date: Wed, 6 Jun 2012 01:13:52 +0200 From: Andi Kleen To: Thomas Gleixner Cc: Andi Kleen , Peter Zijlstra , "Luck\\, Tony" , "Yu\\, Fenghua" , Rusty Russell , Ingo Molnar , H Peter Anvin , "Siddha\\, Suresh B" , "Mallick\\, Asit K" , Arjan Dan De Ven , linux-kernel , x86 , linux-pm , "Srivatsa S. Bhat" Subject: Re: [PATCH 0/6] x86/cpu hotplug: Wake up offline CPU via mwait or nmi Message-ID: <20120605231352.GF27374@one.firstfloor.org> References: <3E5A0FA7E9CA944F9D5414FEC6C7122007727023@ORSMSX105.amr.corp.intel.com> <1338912565.2749.9.camel@twins> <3E5A0FA7E9CA944F9D5414FEC6C7122007728081@ORSMSX105.amr.corp.intel.com> <1338913190.2749.10.camel@twins> <3908561D78D1C84285E8C5FCA982C28F19300965@ORSMSX104.amr.corp.intel.com> <1338918625.2749.29.camel@twins> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.2i Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1399 Lines: 30 > And aside of the above requirements it should add the ability to deal > with the fact that aside of server workloads this needs to be able to > cope with appplications in the embedded/mobile space which know more > about the future system state than the scheduler itself. Well solving world hunger in one try is hard. Baby steps are easier. What I think would be useful short term is a clean mechanism for drivers to lock a interrupt onto a CPU, without irqbalanced touching it. This would be mainly for MSI-X drivers to spread their interrupts properly and give better performance out of the box. Another short term case is the power aware interrupt routing now on recent Intel CPUs. In this case the interrupt needs logical focus to multiple CPUs and the hardware makes the decision (essentially it does power aware load balancing in hardware). Again nobody else should touch it. Then maybe this mechanism could be extended with a power aware software solution with some input from the load balancer like you suggested. I don't have a firm picture on how exactly it should work. -Andi -- ak@linux.intel.com -- Speaking for myself only. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/