Date: Wed, 13 Jun 2012 14:54:24 -0700
From: Andi Kleen <ak@linux.intel.com>
To: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Andi Kleen <andi@firstfloor.org>, mingo@elte.hu,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] perf, x86: Enable PDIR precise instruction profiling
 on IvyBridge
Message-ID: <20120613215424.GG32604@tassilo.jf.intel.com>
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 <20120613213651.GD32604@tassilo.jf.intel.com>
 <1339623838.8980.71.camel@twins>
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> > >nor does the patch actually lift it.
> > 
> > Why not? It works for me on a Ivy Bridge.
> 
> I'm very sure you didn't test it properly then. Clearly you need a hint:
> 
> struct event_constraint intel_snb_pebs_event_constraints[] = {
>         INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PRECDIST */
> 
> Is still in effect, isn't it..

Yes it's in effect, and it forces the event to counter 1. 
That is correct and that restriction is still there. 
Just what is gone is the restriction to quiescence the whole PMU.

Also without that we would refuse to enable PEBS anyways
I believe.

-Andi
-- 
ak@linux.intel.com -- Speaking for myself only
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