From: Danny Huang <dahuang@nvidia.com>
To: Axel Lin <axel.lin@gmail.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
CC: Mike Rapoport <mike@compulab.co.il>, Liam Girdwood <lrg@ti.com>,
        Mark Brown <broonie@opensource.wolfsonmicro.com>
Date: Wed, 20 Jun 2012 16:04:26 +0800
Subject: RE: regulator: tps6586x: What is the meaning of
 TPS6586X_SLEW_RATE_SET setting?
Thread-Topic: regulator: tps6586x: What is the meaning of
 TPS6586X_SLEW_RATE_SET setting?
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Hi Axel,

The TPS6586X_SLEW_RATE_SET is not related with hardware register.
It was used to make sure that the slew rate won't be changed by accident.

Thanks,
Danny

-----Original Message-----
From: Axel Lin [mailto:axel.lin@gmail.com] 
Sent: Tuesday, June 19, 2012 19:15
To: linux-kernel@vger.kernel.org
Cc: Mike Rapoport; Danny Huang; Liam Girdwood; Mark Brown
Subject: regulator: tps6586x: What is the meaning of TPS6586X_SLEW_RATE_SET setting?

Hi Mike,
While looking at the datasheet (tps65860 and tps65862),
I don't understand why we have TPS6586X_SLEW_RATE_SET (0x08) in the code.

According to the datasheet, BIT3 of SM1SL/SM0SL is not used:

SM1SL [Addr 0x25]
SM0SL [Addr 0x28]
        BIT[2:0] SM0/SM1 SUPPLY RAMP RATE
        BIT[7:3] NOT USED

So why we need to check the "unused bit" in tps6586x_regulator_set_slew_rate()?

        if (!(setting->slew_rate & TPS6586X_SLEW_RATE_SET))
                return 0;

Regards,
Axel

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