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Date: Tue, 28 Aug 2012 12:35:29 +0530
Message-ID: <CAKohponjP=GPihEK1T9zEsaBkHD5j4JCALgp0GS8xCsU_9exmw@mail.gmail.com>
Subject: Re: [PATCH 1/2] dw_dmac: make driver endianness configurable
From: Viresh Kumar <viresh.kumar@linaro.org>
To: Hein Tibosch <hein_tibosch@yahoo.es>
Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no>,
        spear-devel <spear-devel@list.st.com>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        "ludovic.desroches" <ludovic.desroches@atmel.com>,
        Havard Skinnemoen <havard@skinnemoen.net>,
        Nicolas Ferre <nicolas.ferre@atmel.com>,
        Andrew Morton <akpm@linux-foundation.org>,
        Arnd Bergmann <arnd.bergmann@linaro.org>
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On 28 August 2012 12:25, Hein Tibosch <hein_tibosch@yahoo.es> wrote:
> What about this:
>
> In case of AVR32, the arch code will indicate:
>
> static struct dw_dma_platform_data dw_dmac0_data = {
>         .nr_channels    = 3,
>         /* DMAC supports up to 32-bit memory access */
>         .mem_access_32_bit_only = true,
> };
>
> ARM users won't have to change anything because mem_access_32_bit_only
> will be false and therefor 'dw->mem_64_bit' will become true

I will go for the earlier solution that you sent: with max-mem-width.
0 = 64 bit, so nothing to be changed for ARM as global structures would be
getting initialized to zero
1=32 bit, pass this for AVR32.

--
viresh
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