Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756768Ab2JRPZe (ORCPT ); Thu, 18 Oct 2012 11:25:34 -0400 Received: from mail-vb0-f46.google.com ([209.85.212.46]:51289 "EHLO mail-vb0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755762Ab2JRPZb convert rfc822-to-8bit (ORCPT ); Thu, 18 Oct 2012 11:25:31 -0400 MIME-Version: 1.0 In-Reply-To: References: <1350538335-29026-1-git-send-email-b32955@freescale.com> <1350541111.5263.3.camel@vkoul-udesk3> <507FA595.4020507@freescale.com> Date: Thu, 18 Oct 2012 20:55:30 +0530 Message-ID: Subject: Re: [PATCH] dma: add new DMA control commands From: Jassi Brar To: Huang Shijie Cc: Huang Shijie , Vinod Koul , marex@denx.de, alsa-devel@alsa-project.org, shawn.guo@linaro.org, linux@arm.linux.org.uk, tiwai@suse.de, artem.bityutskiy@linux.intel.com, broonie@opensource.wolfsonmicro.com, linux-mmc@vger.kernel.org, w.sang@pengutronix.de, perex@perex.cz, linux-mtd@lists.infradead.org, linux-i2c@vger.kernel.org, ben-linux@fluff.org, djbw@fb.com, khali@linux-fr.org, cjb@laptop.org, dwmw2@infradead.org, lrg@ti.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset=GB2312 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1847 Lines: 42 On 18 October 2012 20:48, Huang Shijie wrote: > On Thu, Oct 18, 2012 at 5:29 AM, Jassi Brar wrote: >> On 18 October 2012 12:15, Huang Shijie wrote: >>> ?? 2012??10??18?? 14:18, Vinod Koul ะด??: >>> >>>> Why cant you do start (prepare clock etc) when you submit the descriptor >>>> to dmaengine. Can be done in tx_submit callback. >>>> Similarly remove the clock when dma transaction gets completed. >>> >>> I ever thought this method too. >>> >>> But it will become low efficient in the following case: >>> >>> Assuming the gpmi-nand driver has to read out 1024 pages in one _SINGLE_ >>> read operation. >>> The gpmi-nand will submit the descriptor to dmaengine per page. So with your >>> method, >>> the system will repeat the enable/disable dma clock 1024 time. At every >>> enable/disable dma clock, >>> the system has to enable the clock chain and it's parents ... >>> >>> But with this patch, we only need to enable/disable dma clock one time, just >>> at we select the nand chip. >>> >> If the clock is the dmac's property (not channels'), the toggling >> seems too aggressive. >> You could try using runtime_suspend/resume for clock >> disabling/enabling. How about employing autosuspend with a few ms >> delay? > > Yes, employing the autosuspend is workable method too.o > But it's a little more complicated then this patch. You have to create > a thread or workqueue to > do the job. > I am not sure why you would need to create any thread/workqueue ? Just pm_runtime_put_autosuspend() in drivers/ to see how it works. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/