Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965427Ab2JZQjc (ORCPT ); Fri, 26 Oct 2012 12:39:32 -0400 Received: from mx1.redhat.com ([209.132.183.28]:16842 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965386Ab2JZQja (ORCPT ); Fri, 26 Oct 2012 12:39:30 -0400 Date: Fri, 26 Oct 2012 18:39:51 +0200 From: Oleg Nesterov To: Ananth N Mavinakayanahalli Cc: Rabin Vincent , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Peter Zijlstra , Srikar Dronamraju Subject: Re: [PATCH 6/9] uprobes: flush cache after xol write Message-ID: <20121026163951.GA17742@redhat.com> References: <1350242593-17761-1-git-send-email-rabin@rab.in> <1350242593-17761-6-git-send-email-rabin@rab.in> <20121015165756.GA11737@redhat.com> <20121025145839.GB26929@redhat.com> <20121026055239.GA4862@in.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20121026055239.GA4862@in.ibm.com> User-Agent: Mutt/1.5.18 (2008-05-17) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1877 Lines: 49 On 10/26, Ananth N Mavinakayanahalli wrote: > > On Thu, Oct 25, 2012 at 04:58:39PM +0200, Oleg Nesterov wrote: > > On 10/16, Rabin Vincent wrote: > > > > > > >> --- a/kernel/events/uprobes.c > > > >> +++ b/kernel/events/uprobes.c > > > >> @@ -1246,6 +1246,7 @@ static unsigned long xol_get_insn_slot(struct uprobe *uprobe, unsigned long slot > > > >> offset = current->utask->xol_vaddr & ~PAGE_MASK; > > > >> vaddr = kmap_atomic(area->page); > > > >> arch_uprobe_xol_copy(&uprobe->arch, vaddr + offset); > > > >> + flush_dcache_page(area->page); > > > >> kunmap_atomic(vaddr); > > > > > > > > I agree... but why under kmap_atomic? > > > > > > No real reason; I'll move it to after the unmap. > > > > OK. I assume you will send v2. > > > > But this patch looks like a bugfix, flush_dcache_page() is not a nop > > on powerpc. So perhaps we should apply this fix right now? > > Starting Power5, all Power processers have coherent caches. > > > OTOH, I do not understand this stuff, everything is nop on x86. And > > when I look into Documentation/cachetlb.txt I am starting to think > > that may be this needs flush_icache_user_range instead? > > > > Rabin, Ananth could you clarify this? > > Yes. We need flush_icache_user_range(). Though for x86 its always been a > nop, one never knows if there is some Power4 or older machine out there > that is still being used. We are fine for Power5 and later. This is bad... flush_icache_user needs vma. perhaps just to check VM_EXEC... So let me repeat to be sure I really understand, do you confirm that _in general_ flush_dcache_page() is not enough? Oleg. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/