2002-09-20 20:04:31

by Mehdi Hashemian

[permalink] [raw]
Subject: Fwd: PTE question


As I did not receive any response for the following question, I appreciate
if someone guide me to the right email list to post this question, if there
is any.

Appreciate it,

----Original Message Follows----
From: "Mehdi Hashemian" <[email protected]>
To: [email protected]
Subject: PTE question
Date: Wed, 18 Sep 2002 18:52:25 -0700


Appreciate if someone checks this piece of code. I try to diable cache and
write-through bits in PTE but somehow PTE address is within first 16MB of
memory (DMA_ZONE) and later when Kernel tries to allocate more pages, it
chooses the same address range and this piece of code corrupts memory by
ORing these bits. Any help appreciated!

addr = __get_dma_pages(priority, order);

int npages = __get_npages(order);
unsigned long addr2 = addr;
pgd_t *pgd;
pmd_t *pmd;
pte_t *pte;
int i;

for (i = 0; i < npages; i++)
pgd = pgd_offset(&init_mm, addr2);
pmd = pmd_offset(pgd, addr2);
pte = pte_offset(pmd, addr2);
pte_val(*pte) |= (_PAGE_PCD | _PAGE_PWT);

addr2 += PAGE_SIZE;


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