This patch series allows playing S20_3LE .wav samples with wm8960 codec.
First patch does a small refactoring of sysclk frequency search because
wm8960_configure_sysclk was getting pretty convoluted.
The second patch allows relaxing bitclock computation in the way that
if an exact bitclk couldn't be derived from sysclk it chooses the
smalles available bitclk greater than the desired bitclk.
Changes since v2:
* do not differentiate between relaxed and exact match
Changes since v1:
* dropped the RFC tag
* comments in each individual patch
Daniel Baluta (2):
ASoC: codec: wm8960: Refactor sysclk freq search
ASoC: codec: wm8960: Relax bit clock computation
sound/soc/codecs/wm8960.c | 90 +++++++++++++++++++++++++++++++++++++----------
1 file changed, 71 insertions(+), 19 deletions(-)
--
2.7.4
Add a separate function for finding (sysclk, lrclk, bclk)
when the clock is auto or mclk. This makes code easier to
read and reduces the indentation level in wm8960_configure_clocking.
Signed-off-by: Daniel Baluta <[email protected]>
Acked-by: Charles Keepax <[email protected]>
---
Changes since v2:
* none
sound/soc/codecs/wm8960.c | 80 ++++++++++++++++++++++++++++++++++++-----------
1 file changed, 61 insertions(+), 19 deletions(-)
diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c
index 3bf081a..25a4a11 100644
--- a/sound/soc/codecs/wm8960.c
+++ b/sound/soc/codecs/wm8960.c
@@ -604,12 +604,71 @@ static const int bclk_divs[] = {
120, 160, 220, 240, 320, 320, 320
};
+/**
+ * wm8960_configure_sysclk - checks if there is a sysclk frequency available
+ * The sysclk must be chosen such that:
+ * - sysclk = MCLK / sysclk_divs
+ * - lrclk = sysclk / dac_divs
+ * - 10 * bclk = sysclk / bclk_divs
+ *
+ * @wm8960_priv: wm8960 codec private data
+ * @mclk: MCLK used to derive sysclk
+ * @sysclk_idx: sysclk_divs index for found sysclk
+ * @dac_idx: dac_divs index for found lrclk
+ * @bclk_idx: bclk_divs index for found bclk
+ *
+ * Returns:
+ * -1, in case no sysclk frequency available found
+ * 0, in case an exact (@sysclk_idx, @dac_idx, @bclk_idx) match is found
+ */
+static
+int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
+ int *sysclk_idx, int *dac_idx, int *bclk_idx)
+{
+ int sysclk, bclk, lrclk;
+ int i, j, k;
+ int diff;
+
+ bclk = wm8960->bclk;
+ lrclk = wm8960->lrclk;
+
+ /* check if the sysclk frequency is available. */
+ for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
+ if (sysclk_divs[i] == -1)
+ continue;
+ sysclk = mclk / sysclk_divs[i];
+ for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
+ if (sysclk != dac_divs[j] * lrclk)
+ continue;
+ for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
+ diff = sysclk - bclk * bclk_divs[k] / 10;
+ if (diff == 0) {
+ *sysclk_idx = i;
+ *dac_idx = j;
+ *bclk_idx = k;
+ break;
+ }
+ }
+ if (k != ARRAY_SIZE(bclk_divs))
+ break;
+ }
+ if (j != ARRAY_SIZE(dac_divs))
+ break;
+ }
+
+ if (i != ARRAY_SIZE(sysclk_divs))
+ return 0;
+
+ return -1;
+}
+
static int wm8960_configure_clocking(struct snd_soc_codec *codec)
{
struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
int sysclk, bclk, lrclk, freq_out, freq_in;
u16 iface1 = snd_soc_read(codec, WM8960_IFACE1);
int i, j, k;
+ int ret;
if (!(iface1 & (1<<6))) {
dev_dbg(codec->dev,
@@ -643,25 +702,8 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec)
}
if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
- /* check if the sysclk frequency is available. */
- for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
- if (sysclk_divs[i] == -1)
- continue;
- sysclk = freq_out / sysclk_divs[i];
- for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
- if (sysclk != dac_divs[j] * lrclk)
- continue;
- for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k)
- if (sysclk == bclk * bclk_divs[k] / 10)
- break;
- if (k != ARRAY_SIZE(bclk_divs))
- break;
- }
- if (j != ARRAY_SIZE(dac_divs))
- break;
- }
-
- if (i != ARRAY_SIZE(sysclk_divs)) {
+ ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
+ if (ret == 0) {
goto configure_clock;
} else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
dev_err(codec->dev, "failed to configure clock\n");
--
2.7.4
WM8960 derives bit clock from sysclock using BCLKDIV[3:0] of R8
clocking register (See WM8960 datasheet, page 71).
There are use cases, like this:
aplay -Dhw:0,0 -r 48000 -c 1 -f S20_3LE -t raw audio48k20b_3LE1c.pcm
where no BCLKDIV applied to sysclock can give us the exact requested
bitclk, so driver fails to configure clocking and aplay fails to run.
Fix this by relaxing bitclk computation, so that when no exact value
can be derived from sysclk pick the closest value greater than
expected bitclk.
Suggested-by: Charles Keepax <[email protected]>
Signed-off-by: Daniel Baluta <[email protected]>
---
Changes since v2:
* do not differentiate between relaxed and exact match
sound/soc/codecs/wm8960.c | 28 +++++++++++++++++++---------
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c
index 25a4a11..ce159f1 100644
--- a/sound/soc/codecs/wm8960.c
+++ b/sound/soc/codecs/wm8960.c
@@ -611,6 +611,10 @@ static const int bclk_divs[] = {
* - lrclk = sysclk / dac_divs
* - 10 * bclk = sysclk / bclk_divs
*
+ * If we cannot find an exact match for (sysclk, lrclk, bclk)
+ * triplet, we relax the bclk such that bclk is chosen as the
+ * closest available frequency greater than expected bclk.
+ *
* @wm8960_priv: wm8960 codec private data
* @mclk: MCLK used to derive sysclk
* @sysclk_idx: sysclk_divs index for found sysclk
@@ -618,8 +622,9 @@ static const int bclk_divs[] = {
* @bclk_idx: bclk_divs index for found bclk
*
* Returns:
- * -1, in case no sysclk frequency available found
- * 0, in case an exact (@sysclk_idx, @dac_idx, @bclk_idx) match is found
+ * -1, in case no sysclk frequency available found
+ * >=0, in case we could derive bclk and lrclk from sysclk using
+ * (@sysclk_idx, @dac_idx, @bclk_idx) dividers
*/
static
int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
@@ -627,7 +632,10 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
{
int sysclk, bclk, lrclk;
int i, j, k;
- int diff;
+ int diff, closest = mclk;
+
+ /* marker for no match */
+ *bclk_idx = -1;
bclk = wm8960->bclk;
lrclk = wm8960->lrclk;
@@ -648,6 +656,12 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
*bclk_idx = k;
break;
}
+ if (diff > 0 && closest > diff) {
+ *sysclk_idx = i;
+ *dac_idx = j;
+ *bclk_idx = k;
+ closest = diff;
+ }
}
if (k != ARRAY_SIZE(bclk_divs))
break;
@@ -655,11 +669,7 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
if (j != ARRAY_SIZE(dac_divs))
break;
}
-
- if (i != ARRAY_SIZE(sysclk_divs))
- return 0;
-
- return -1;
+ return *bclk_idx;
}
static int wm8960_configure_clocking(struct snd_soc_codec *codec)
@@ -703,7 +713,7 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec)
if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
- if (ret == 0) {
+ if (ret >= 0) {
goto configure_clock;
} else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
dev_err(codec->dev, "failed to configure clock\n");
--
2.7.4
On Tue, Mar 21, 2017 at 05:03:25PM +0200, Daniel Baluta wrote:
> WM8960 derives bit clock from sysclock using BCLKDIV[3:0] of R8
> clocking register (See WM8960 datasheet, page 71).
>
> There are use cases, like this:
> aplay -Dhw:0,0 -r 48000 -c 1 -f S20_3LE -t raw audio48k20b_3LE1c.pcm
>
> where no BCLKDIV applied to sysclock can give us the exact requested
> bitclk, so driver fails to configure clocking and aplay fails to run.
>
> Fix this by relaxing bitclk computation, so that when no exact value
> can be derived from sysclk pick the closest value greater than
> expected bitclk.
>
> Suggested-by: Charles Keepax <[email protected]>
> Signed-off-by: Daniel Baluta <[email protected]>
> ---
Acked-by: Charles Keepax <[email protected]>
Thanks,
Charles
The patch
ASoC: codec: wm8960: Relax bit clock computation
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From 3c01b9ee2ab9d0dffe837c12ed93740516a673d7 Mon Sep 17 00:00:00 2001
From: Daniel Baluta <[email protected]>
Date: Tue, 21 Mar 2017 17:03:25 +0200
Subject: [PATCH] ASoC: codec: wm8960: Relax bit clock computation
WM8960 derives bit clock from sysclock using BCLKDIV[3:0] of R8
clocking register (See WM8960 datasheet, page 71).
There are use cases, like this:
aplay -Dhw:0,0 -r 48000 -c 1 -f S20_3LE -t raw audio48k20b_3LE1c.pcm
where no BCLKDIV applied to sysclock can give us the exact requested
bitclk, so driver fails to configure clocking and aplay fails to run.
Fix this by relaxing bitclk computation, so that when no exact value
can be derived from sysclk pick the closest value greater than
expected bitclk.
Suggested-by: Charles Keepax <[email protected]>
Signed-off-by: Daniel Baluta <[email protected]>
Acked-by: Charles Keepax <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
---
sound/soc/codecs/wm8960.c | 28 +++++++++++++++++++---------
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c
index 25a4a11929fe..ce159f13e7a4 100644
--- a/sound/soc/codecs/wm8960.c
+++ b/sound/soc/codecs/wm8960.c
@@ -611,6 +611,10 @@ static const int bclk_divs[] = {
* - lrclk = sysclk / dac_divs
* - 10 * bclk = sysclk / bclk_divs
*
+ * If we cannot find an exact match for (sysclk, lrclk, bclk)
+ * triplet, we relax the bclk such that bclk is chosen as the
+ * closest available frequency greater than expected bclk.
+ *
* @wm8960_priv: wm8960 codec private data
* @mclk: MCLK used to derive sysclk
* @sysclk_idx: sysclk_divs index for found sysclk
@@ -618,8 +622,9 @@ static const int bclk_divs[] = {
* @bclk_idx: bclk_divs index for found bclk
*
* Returns:
- * -1, in case no sysclk frequency available found
- * 0, in case an exact (@sysclk_idx, @dac_idx, @bclk_idx) match is found
+ * -1, in case no sysclk frequency available found
+ * >=0, in case we could derive bclk and lrclk from sysclk using
+ * (@sysclk_idx, @dac_idx, @bclk_idx) dividers
*/
static
int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
@@ -627,7 +632,10 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
{
int sysclk, bclk, lrclk;
int i, j, k;
- int diff;
+ int diff, closest = mclk;
+
+ /* marker for no match */
+ *bclk_idx = -1;
bclk = wm8960->bclk;
lrclk = wm8960->lrclk;
@@ -648,6 +656,12 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
*bclk_idx = k;
break;
}
+ if (diff > 0 && closest > diff) {
+ *sysclk_idx = i;
+ *dac_idx = j;
+ *bclk_idx = k;
+ closest = diff;
+ }
}
if (k != ARRAY_SIZE(bclk_divs))
break;
@@ -655,11 +669,7 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
if (j != ARRAY_SIZE(dac_divs))
break;
}
-
- if (i != ARRAY_SIZE(sysclk_divs))
- return 0;
-
- return -1;
+ return *bclk_idx;
}
static int wm8960_configure_clocking(struct snd_soc_codec *codec)
@@ -703,7 +713,7 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec)
if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
- if (ret == 0) {
+ if (ret >= 0) {
goto configure_clock;
} else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
dev_err(codec->dev, "failed to configure clock\n");
--
2.11.0