2020-12-02 20:34:56

by Jernej Skrabec

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Subject: [PATCH] clk: sunxi-ng: Make sure divider tables have sentinel

---

Two clock divider tables are missing sentinel at the end. Effect of that
is that clock framework reads past the last entry. Fix that with adding
sentinel at the end.

Issue was discovered with KASan.

Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks")
Fixes: c6a0637460c2 ("clk: sunxi-ng: Add A64 clocks")
Signed-off-by: Jernej Skrabec <[email protected]>
---
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 1 +
drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 1 +
2 files changed, 2 insertions(+)

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index 5f66bf879772..149cfde817cb 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -389,6 +389,7 @@ static struct clk_div_table ths_div_table[] = {
{ .val = 1, .div = 2 },
{ .val = 2, .div = 4 },
{ .val = 3, .div = 6 },
+ { /* Sentinel */ },
};
static const char * const ths_parents[] = { "osc24M" };
static struct ccu_div ths_clk = {
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
index 6b636362379e..7e629a4493af 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
@@ -322,6 +322,7 @@ static struct clk_div_table ths_div_table[] = {
{ .val = 1, .div = 2 },
{ .val = 2, .div = 4 },
{ .val = 3, .div = 6 },
+ { /* Sentinel */ },
};
static SUNXI_CCU_DIV_TABLE_WITH_GATE(ths_clk, "ths", "osc24M",
0x074, 0, 2, ths_div_table, BIT(31), 0);
--
2.29.2

2020-12-03 07:39:36

by Maxime Ripard

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Subject: Re: [PATCH] clk: sunxi-ng: Make sure divider tables have sentinel

---

Hi,

On Wed, Dec 02, 2020 at 09:38:17PM +0100, Jernej Skrabec wrote:
> Two clock divider tables are missing sentinel at the end. Effect of that
> is that clock framework reads past the last entry. Fix that with adding
> sentinel at the end.
>
> Issue was discovered with KASan.
>
> Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks")
> Fixes: c6a0637460c2 ("clk: sunxi-ng: Add A64 clocks")
> Signed-off-by: Jernej Skrabec <[email protected]>

Acked-by: Maxime Ripard <[email protected]>

Mike, Stephen, it's the only patch we're going to send your way for this
release, could you pick it up directly?

Thanks!
Maxime

---

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2020-12-19 23:56:18

by Stephen Boyd

[permalink] [raw]

Subject: Re: [PATCH] clk: sunxi-ng: Make sure divider tables have sentinel

---

Quoting Jernej Skrabec (2020-12-02 12:38:17)
> Two clock divider tables are missing sentinel at the end. Effect of that
> is that clock framework reads past the last entry. Fix that with adding
> sentinel at the end.
>
> Issue was discovered with KASan.
>
> Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks")
> Fixes: c6a0637460c2 ("clk: sunxi-ng: Add A64 clocks")
> Signed-off-by: Jernej Skrabec <[email protected]>
> ---

Applied to clk-next