It adds the map of wakeup capable GPIOs and the pins at MPM wake
controller on QCM2290, so that these GPIOs can wake up the SoC from
vlow/vmin low power mode.
Signed-off-by: Shawn Guo <[email protected]>
---
drivers/pinctrl/qcom/pinctrl-qcm2290.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-qcm2290.c b/drivers/pinctrl/qcom/pinctrl-qcm2290.c
index 3f05c0a24b79..aa9325f333fb 100644
--- a/drivers/pinctrl/qcom/pinctrl-qcm2290.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcm2290.c
@@ -1083,6 +1083,16 @@ static const struct msm_pingroup qcm2290_groups[] = {
[133] = SDC_QDSD_PINGROUP(sdc2_data, 0x86000, 9, 0),
};
+static const struct msm_gpio_wakeirq_map qcm2290_mpm_map[] = {
+ { 0, 84 }, { 3, 75 }, { 4, 16 }, { 6, 59 }, { 8, 63 }, { 11, 17 },
+ { 13, 18 }, { 14, 51 }, { 17, 20 }, { 18, 52 }, { 19, 53 }, { 24, 6 },
+ { 25, 71 }, { 27, 73 }, { 28, 41 }, { 31, 27 }, { 32, 54 }, { 33, 55 },
+ { 34, 56 }, { 35, 57 }, { 36, 58 }, { 39, 28 }, { 46, 29 }, { 62, 60 },
+ { 63, 61 }, { 64, 62 }, { 69, 33 }, { 70, 34 }, { 72, 72 }, { 75, 35 },
+ { 79, 36 }, { 80, 21 }, { 81, 38 }, { 86, 19 }, { 87, 42 }, { 88, 43 },
+ { 89, 45 }, { 91, 74 }, { 94, 47 }, { 95, 48 }, { 96, 49 }, { 97, 50 },
+};
+
static const struct msm_pinctrl_soc_data qcm2290_pinctrl = {
.pins = qcm2290_pins,
.npins = ARRAY_SIZE(qcm2290_pins),
@@ -1091,6 +1101,8 @@ static const struct msm_pinctrl_soc_data qcm2290_pinctrl = {
.groups = qcm2290_groups,
.ngroups = ARRAY_SIZE(qcm2290_groups),
.ngpios = 127,
+ .wakeirq_map = qcm2290_mpm_map,
+ .nwakeirq_map = ARRAY_SIZE(qcm2290_mpm_map),
};
static int qcm2290_pinctrl_probe(struct platform_device *pdev)
--
2.17.1
On Mon, Nov 22, 2021 at 04:09:38PM +0800, Shawn Guo wrote:
> It adds the map of wakeup capable GPIOs and the pins at MPM wake
> controller on QCM2290, so that these GPIOs can wake up the SoC from
> vlow/vmin low power mode.
>
> Signed-off-by: Shawn Guo <[email protected]>
Any comments on this patch?
Shawn
> ---
> drivers/pinctrl/qcom/pinctrl-qcm2290.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/pinctrl/qcom/pinctrl-qcm2290.c b/drivers/pinctrl/qcom/pinctrl-qcm2290.c
> index 3f05c0a24b79..aa9325f333fb 100644
> --- a/drivers/pinctrl/qcom/pinctrl-qcm2290.c
> +++ b/drivers/pinctrl/qcom/pinctrl-qcm2290.c
> @@ -1083,6 +1083,16 @@ static const struct msm_pingroup qcm2290_groups[] = {
> [133] = SDC_QDSD_PINGROUP(sdc2_data, 0x86000, 9, 0),
> };
>
> +static const struct msm_gpio_wakeirq_map qcm2290_mpm_map[] = {
> + { 0, 84 }, { 3, 75 }, { 4, 16 }, { 6, 59 }, { 8, 63 }, { 11, 17 },
> + { 13, 18 }, { 14, 51 }, { 17, 20 }, { 18, 52 }, { 19, 53 }, { 24, 6 },
> + { 25, 71 }, { 27, 73 }, { 28, 41 }, { 31, 27 }, { 32, 54 }, { 33, 55 },
> + { 34, 56 }, { 35, 57 }, { 36, 58 }, { 39, 28 }, { 46, 29 }, { 62, 60 },
> + { 63, 61 }, { 64, 62 }, { 69, 33 }, { 70, 34 }, { 72, 72 }, { 75, 35 },
> + { 79, 36 }, { 80, 21 }, { 81, 38 }, { 86, 19 }, { 87, 42 }, { 88, 43 },
> + { 89, 45 }, { 91, 74 }, { 94, 47 }, { 95, 48 }, { 96, 49 }, { 97, 50 },
> +};
> +
> static const struct msm_pinctrl_soc_data qcm2290_pinctrl = {
> .pins = qcm2290_pins,
> .npins = ARRAY_SIZE(qcm2290_pins),
> @@ -1091,6 +1101,8 @@ static const struct msm_pinctrl_soc_data qcm2290_pinctrl = {
> .groups = qcm2290_groups,
> .ngroups = ARRAY_SIZE(qcm2290_groups),
> .ngpios = 127,
> + .wakeirq_map = qcm2290_mpm_map,
> + .nwakeirq_map = ARRAY_SIZE(qcm2290_mpm_map),
> };
>
> static int qcm2290_pinctrl_probe(struct platform_device *pdev)
> --
> 2.17.1
>
On Mon, Nov 22, 2021 at 9:09 AM Shawn Guo <[email protected]> wrote:
> It adds the map of wakeup capable GPIOs and the pins at MPM wake
> controller on QCM2290, so that these GPIOs can wake up the SoC from
> vlow/vmin low power mode.
>
> Signed-off-by: Shawn Guo <[email protected]>
Ooops missed patch, I just applied it.
Yours,
Linus Walleij