From: Frank Wunderlich <[email protected]>
Create a yaml file for dtbs_check from the old txt binding.
Signed-off-by: Frank Wunderlich <[email protected]>
---
.../devicetree/bindings/ata/ahci-platform.txt | 79 -----------
.../bindings/ata/ahci-platform.yaml | 134 ++++++++++++++++++
2 files changed, 134 insertions(+), 79 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.txt
create mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.yaml
diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
deleted file mode 100644
index 77091a277642..000000000000
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ /dev/null
@@ -1,79 +0,0 @@
-* AHCI SATA Controller
-
-SATA nodes are defined to describe on-chip Serial ATA controllers.
-Each SATA controller should have its own node.
-
-It is possible, but not required, to represent each port as a sub-node.
-It allows to enable each port independently when dealing with multiple
-PHYs.
-
-Required properties:
-- compatible : compatible string, one of:
- - "brcm,iproc-ahci"
- - "hisilicon,hisi-ahci"
- - "cavium,octeon-7130-ahci"
- - "ibm,476gtr-ahci"
- - "marvell,armada-380-ahci"
- - "marvell,armada-3700-ahci"
- - "snps,dwc-ahci"
- - "snps,spear-ahci"
- - "generic-ahci"
-- interrupts : <interrupt mapping for SATA IRQ>
-- reg : <registers mapping>
-
-Please note that when using "generic-ahci" you must also specify a SoC specific
-compatible:
- compatible = "manufacturer,soc-model-ahci", "generic-ahci";
-
-Optional properties:
-- dma-coherent : Present if dma operations are coherent
-- clocks : a list of phandle + clock specifier pairs
-- resets : a list of phandle + reset specifier pairs
-- target-supply : regulator for SATA target power
-- phy-supply : regulator for PHY power
-- phys : reference to the SATA PHY node
-- phy-names : must be "sata-phy"
-- ahci-supply : regulator for AHCI controller
-- ports-implemented : Mask that indicates which ports that the HBA supports
- are available for software to use. Useful if PORTS_IMPL
- is not programmed by the BIOS, which is true with
- some embedded SOC's.
-
-Required properties when using sub-nodes:
-- #address-cells : number of cells to encode an address
-- #size-cells : number of cells representing the size of an address
-
-Sub-nodes required properties:
-- reg : the port number
-And at least one of the following properties:
-- phys : reference to the SATA PHY node
-- target-supply : regulator for SATA target power
-
-Examples:
- sata@ffe08000 {
- compatible = "snps,spear-ahci";
- reg = <0xffe08000 0x1000>;
- interrupts = <115>;
- };
-
-With sub-nodes:
- sata@f7e90000 {
- compatible = "marvell,berlin2q-achi", "generic-ahci";
- reg = <0xe90000 0x1000>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&chip CLKID_SATA>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- sata0: sata-port@0 {
- reg = <0>;
- phys = <&sata_phy 0>;
- target-supply = <®_sata0>;
- };
-
- sata1: sata-port@1 {
- reg = <1>;
- phys = <&sata_phy 1>;
- target-supply = <®_sata1>;;
- };
- };
diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml
new file mode 100644
index 000000000000..b5bef93215c0
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml
@@ -0,0 +1,134 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: AHCI SATA Controller
+description:
+ SATA nodes are defined to describe on-chip Serial ATA controllers.
+ Each SATA controller should have its own node.
+
+ It is possible, but not required, to represent each port as a sub-node.
+ It allows to enable each port independently when dealing with multiple
+ PHYs.
+
+maintainers:
+ - Hans de Goede <[email protected]>
+ - Jens Axboe <[email protected]>
+
+properties:
+ compatible:
+ enum:
+ - brcm,iproc-ahci
+ - hisilicon,hisi-ahci
+ - cavium,octeon-7130-ahci
+ - ibm,476gtr-ahci
+ - marvell,armada-380-ahci
+ - marvell,armada-3700-ahci
+ - snps,dwc-ahci
+ - snps,spear-ahci
+ - generic-ahci
+
+ ahci-supply:
+ description:
+ regulator for AHCI controller
+
+ dma-coherent:
+ description:
+ Present if dma operations are coherent
+
+ clocks:
+ minItems: 1
+ maxItems: 3
+
+ interrupts:
+ minItems: 1
+
+ phy-supply:
+ description:
+ regulator for PHY power
+
+ phys:
+ minItems: 1
+
+ phy-names:
+ minItems: 1
+
+ ports-implemented:
+ description:
+ Mask that indicates which ports that the HBA supports
+ are available for software to use. Useful if PORTS_IMPL
+ is not programmed by the BIOS, which is true with
+ some embedded SOC's.
+ minItems: 1
+
+ reg:
+ maxItems: 1
+
+ resets:
+ minItems: 1
+
+ target-supply:
+ description:
+ regulator for SATA target power
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+patternProperties:
+ "^sata-port@[0-9]+$":
+ type: object
+ description:
+ Subnode with configuration of the Ports.
+
+ properties:
+ reg:
+ maxItems: 1
+
+ phys:
+ minItems: 1
+
+ target-supply:
+ description:
+ regulator for SATA target power
+
+ required:
+ - reg
+
+ anyOf:
+ - required: [ phys ]
+ - required: [ target-supply ]
+
+additionalProperties: true
+
+examples:
+ - |
+ sata@ffe08000 {
+ compatible = "snps,spear-ahci";
+ reg = <0xffe08000 0x1000>;
+ interrupts = <115>;
+ };
+ - |
+ sata@f7e90000 {
+ compatible = "marvell,berlin2q-achi", "generic-ahci";
+ reg = <0xe90000 0x1000>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&chip CLKID_SATA>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sata0: sata-port@0 {
+ reg = <0>;
+ phys = <&sata_phy 0>;
+ target-supply = <®_sata0>;
+ };
+
+ sata1: sata-port@1 {
+ reg = <1>;
+ phys = <&sata_phy 1>;
+ target-supply = <®_sata1>;;
+ };
+ };
--
2.25.1
Hi Frank,
Combine your patch in a serie with Rockchip rk356x sata nodes and
include all current CC people and Rockchip list.
Your conversion and DT patch contains lots of errors.
Check your serie with all/more platforms then Rockchip before you submit
and fix.
ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make dt_binding_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/ata/ahci-platform.yaml
ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/ata/ahci-platform.yaml
Add power-domains as a new property after the conversion patch.
Johan
===
make a serie:
conversion ahci-platform.yaml
power-domains patch
rockchip rk356x sata nodes patch
On 2/26/22 21:44, Frank Wunderlich wrote:
> From: Frank Wunderlich <[email protected]>
>
> Create a yaml file for dtbs_check from the old txt binding.
>
> Signed-off-by: Frank Wunderlich <[email protected]>
> ---
> .../devicetree/bindings/ata/ahci-platform.txt | 79 -----------
> .../bindings/ata/ahci-platform.yaml | 134 ++++++++++++++++++
> 2 files changed, 134 insertions(+), 79 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.txt
> create mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.yaml
>
> diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
> deleted file mode 100644
> index 77091a277642..000000000000
> --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
> +++ /dev/null
> @@ -1,79 +0,0 @@
> -* AHCI SATA Controller
> -
> -SATA nodes are defined to describe on-chip Serial ATA controllers.
> -Each SATA controller should have its own node.
> -
> -It is possible, but not required, to represent each port as a sub-node.
> -It allows to enable each port independently when dealing with multiple
> -PHYs.
> -
> -Required properties:
> -- compatible : compatible string, one of:
> - - "brcm,iproc-ahci"
> - - "hisilicon,hisi-ahci"
> - - "cavium,octeon-7130-ahci"
> - - "ibm,476gtr-ahci"
> - - "marvell,armada-380-ahci"
> - - "marvell,armada-3700-ahci"
> - - "snps,dwc-ahci"
> - - "snps,spear-ahci"
> - - "generic-ahci"
> -- interrupts : <interrupt mapping for SATA IRQ>
> -- reg : <registers mapping>
> -
> -Please note that when using "generic-ahci" you must also specify a SoC specific
> -compatible:
> - compatible = "manufacturer,soc-model-ahci", "generic-ahci";
> -
> -Optional properties:
> -- dma-coherent : Present if dma operations are coherent
> -- clocks : a list of phandle + clock specifier pairs
> -- resets : a list of phandle + reset specifier pairs
> -- target-supply : regulator for SATA target power
> -- phy-supply : regulator for PHY power
> -- phys : reference to the SATA PHY node
> -- phy-names : must be "sata-phy"
> -- ahci-supply : regulator for AHCI controller
> -- ports-implemented : Mask that indicates which ports that the HBA supports
> - are available for software to use. Useful if PORTS_IMPL
> - is not programmed by the BIOS, which is true with
> - some embedded SOC's.
> -
> -Required properties when using sub-nodes:
> -- #address-cells : number of cells to encode an address
> -- #size-cells : number of cells representing the size of an address
> -
> -Sub-nodes required properties:
> -- reg : the port number
> -And at least one of the following properties:
> -- phys : reference to the SATA PHY node
> -- target-supply : regulator for SATA target power
> -
> -Examples:
> - sata@ffe08000 {
> - compatible = "snps,spear-ahci";
> - reg = <0xffe08000 0x1000>;
> - interrupts = <115>;
> - };
> -
> -With sub-nodes:
> - sata@f7e90000 {
> - compatible = "marvell,berlin2q-achi", "generic-ahci";
> - reg = <0xe90000 0x1000>;
> - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&chip CLKID_SATA>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - sata0: sata-port@0 {
> - reg = <0>;
> - phys = <&sata_phy 0>;
> - target-supply = <®_sata0>;
> - };
> -
> - sata1: sata-port@1 {
> - reg = <1>;
> - phys = <&sata_phy 1>;
> - target-supply = <®_sata1>;;
> - };
> - };
> diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml
> new file mode 100644
> index 000000000000..b5bef93215c0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml
> @@ -0,0 +1,134 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: AHCI SATA Controller
> +description:
> + SATA nodes are defined to describe on-chip Serial ATA controllers.
> + Each SATA controller should have its own node.
> +
> + It is possible, but not required, to represent each port as a sub-node.
> + It allows to enable each port independently when dealing with multiple
> + PHYs.
> +> +maintainers:
> + - Hans de Goede <[email protected]>
> + - Jens Axboe <[email protected]>
> +
include sata-common.yaml
> +properties:
compatible
reg
interrupts
clocks
the rest
> + compatible:
> + enum:
> + - brcm,iproc-ahci
> + - hisilicon,hisi-ahci
> + - cavium,octeon-7130-ahci
> + - ibm,476gtr-ahci
> + - marvell,armada-380-ahci
> + - marvell,armada-3700-ahci
> + - snps,dwc-ahci
> + - snps,spear-ahci
> + - generic-ahci
Sort list in case someone after you wants to add something.
> +
> + ahci-supply:
> + description:
> + regulator for AHCI controller
> +
> + dma-coherent:
> + description:
> + Present if dma operations are coherent
> +
> + clocks:
> + minItems: 1
> + maxItems: 3
> +
> + interrupts:
> + minItems: 1
> +
> + phy-supply:
> + description:
> + regulator for PHY power
> +
> + phys:
> + minItems: 1
> +
> + phy-names:
> + minItems: 1
> +
> + ports-implemented:
> + description:
> + Mask that indicates which ports that the HBA supports
> + are available for software to use. Useful if PORTS_IMPL
> + is not programmed by the BIOS, which is true with
> + some embedded SOC's.
> + minItems: 1
> +
> + reg:
> + maxItems: 1
> +
> + resets:
> + minItems: 1
> +
> + target-supply:
> + description:
> + regulator for SATA target power
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
A node without clocks does that work?
Shouldn't that be required?
> +
> +patternProperties:
> + "^sata-port@[0-9]+$":
Already in included sata-common.yaml
"^sata-port@[0-9a-e]$":
How many ports does this thing support??
> + type: object
> + description:
> + Subnode with configuration of the Ports.
> +
> + properties:
> + reg:
> + maxItems: 1
Already in included sata-common.yaml
Include only additional special things.
> +
> + phys:
> + minItems: 1
> +
> + target-supply:
> + description:
> + regulator for SATA target power
> +
> + required:
> + - reg
> +
> + anyOf:
> + - required: [ phys ]
> + - required: [ target-supply ]
> +
> +additionalProperties: true
> +
> +examples:
> + - |
> + sata@ffe08000 {
> + compatible = "snps,spear-ahci";
> + reg = <0xffe08000 0x1000>;
> + interrupts = <115>;
> + };
> + - |
> + sata@f7e90000 {
> + compatible = "marvell,berlin2q-achi", "generic-ahci";
> + reg = <0xe90000 0x1000>;
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&chip CLKID_SATA>;
Missing includes for these defines.
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + sata0: sata-port@0 {
> + reg = <0>;
> + phys = <&sata_phy 0>;
> + target-supply = <®_sata0>;
> + };
> +
> + sata1: sata-port@1 {
> + reg = <1>;
> + phys = <&sata_phy 1>;
> + target-supply = <®_sata1>;;
> + };
> + };