2022-09-23 13:08:50

by Srinivasa Rao Mandadapu

[permalink] [raw]
Subject: [PATCH v8 1/7] dt-bindings: remoteproc: qcom: Add SC7280 ADSP support

Add ADSP PIL loading support for SC7280 SoCs.

Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
---
Changes since V7:
-- Remove redundant clocks in dt bindings.
-- Fix dt compilation error in dt bindings.
Changes since V6:
-- Update glink-edge property.
-- Add qcom,qmp property.
Changes since V5:
-- Remove qcom,adsp-memory-regions property.
Changes since V4:
-- Update halt registers description in dt bindings.

.../bindings/remoteproc/qcom,sc7280-adsp-pil.yaml | 207 +++++++++++++++++++++
1 file changed, 207 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml
new file mode 100644
index 0000000..79ef3c0
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml
@@ -0,0 +1,207 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SC7280 ADSP Peripheral Image Loader
+
+maintainers:
+ - Srinivasa Rao Mandadapu <[email protected]>
+
+description:
+ This document describes the hardware for a component that loads and boots firmware
+ on the Qualcomm Technology Inc. ADSP.
+
+properties:
+ compatible:
+ enum:
+ - qcom,sc7280-adsp-pil
+
+ reg:
+ minItems: 1
+ items:
+ - description: qdsp6ss register
+ - description: efuse q6ss register
+
+ interrupts:
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+ - description: Shutdown acknowledge interrupt
+
+ interrupt-names:
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+ - const: shutdown-ack
+
+ clocks:
+ items:
+ - description: XO clock
+ - description: GCC CFG NOC LPASS clock
+
+ clock-names:
+ items:
+ - const: xo
+ - const: gcc_cfg_noc_lpass
+
+ power-domains:
+ items:
+ - description: LCX power domain
+
+ resets:
+ items:
+ - description: PDC AUDIO SYNC RESET
+ - description: CC LPASS restart
+
+ reset-names:
+ items:
+ - const: pdc_sync
+ - const: cc_lpass
+
+ memory-region:
+ maxItems: 1
+ description: Reference to the reserved-memory for the Hexagon core
+
+ qcom,halt-regs:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description:
+ Phandle reference to a syscon representing TCSR followed by the
+ four offsets within syscon for q6, CE, AXI and qv6 halt registers.
+ items:
+ items:
+ - description: phandle to TCSR MUTEX
+ - description: offset to q6 halt registers
+ - description: offset to CE halt registers
+ - description: offset to AXI halt registers
+ - description: offset to qv6 halt registers
+
+ qcom,smem-states:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: States used by the AP to signal the Hexagon core
+ items:
+ - description: Stop the modem
+
+ qcom,smem-state-names:
+ description: The names of the state bits used for SMP2P output
+ const: stop
+
+ qcom,qmp:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: Reference to the AOSS side-channel message RAM.
+
+ glink-edge:
+ type: object
+ description: |
+ Qualcomm G-Link subnode which represents communication edge, channels
+ and devices related to the ADSP.
+
+ properties:
+ interrupts:
+ items:
+ - description: IRQ from ADSP to GLINK
+
+ mboxes:
+ items:
+ - description: Mailbox for communication between APPS and ADSP
+
+ label:
+ description: The names of the state bits used for SMP2P output
+ items:
+ - const: lpass
+
+ qcom,remote-pid:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: ID of the shared memory used by GLINK for communication with ADSP
+
+ gpr: true
+ apr: false
+ fastrpc: false
+
+ required:
+ - interrupts
+ - mboxes
+ - label
+ - qcom,remote-pid
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - power-domains
+ - resets
+ - reset-names
+ - qcom,halt-regs
+ - memory-region
+ - qcom,smem-states
+ - qcom,smem-state-names
+ - qcom,qmp
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/clock/qcom,gcc-sc7280.h>
+ #include <dt-bindings/clock/qcom,lpass-sc7280.h>
+ #include <dt-bindings/reset/qcom,sdm845-aoss.h>
+ #include <dt-bindings/reset/qcom,sdm845-pdc.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+ #include <dt-bindings/mailbox/qcom-ipcc.h>
+
+ [email protected] {
+ compatible = "qcom,sc7280-adsp-pil";
+ reg = <0x03000000 0x5000>,
+ <0x0355b000 0x10>;
+
+ interrupts-extended = <&pdc 162 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack", "shutdown-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&gcc GCC_CFG_NOC_LPASS_CLK>;
+ clock-names = "xo", "gcc_cfg_noc_lpass";
+
+ power-domains = <&rpmhpd SC7280_LCX>;
+
+ resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>,
+ <&aoss_reset AOSS_CC_LPASS_RESTART>;
+ reset-names = "pdc_sync", "cc_lpass";
+
+ qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
+
+ memory-region = <&adsp_mem>;
+
+ qcom,smem-states = <&adsp_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ qcom,qmp = <&aoss_qmp>;
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "lpass";
+ qcom,remote-pid = <2>;
+ };
+ };
--
2.7.4


2022-09-23 17:54:04

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v8 1/7] dt-bindings: remoteproc: qcom: Add SC7280 ADSP support

On 23/09/2022 15:05, Srinivasa Rao Mandadapu wrote:
> Add ADSP PIL loading support for SC7280 SoCs.
>
> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
> Reviewed-by: Rob Herring <[email protected]>
> Reviewed-by: Stephen Boyd <[email protected]>
> ---
> Changes since V7:
> -- Remove redundant clocks in dt bindings.
> -- Fix dt compilation error in dt bindings.
> Changes since V6:
> -- Update glink-edge property.
> -- Add qcom,qmp property.
> Changes since V5:
> -- Remove qcom,adsp-memory-regions property.
> Changes since V4:
> -- Update halt registers description in dt bindings.
>
> .../bindings/remoteproc/qcom,sc7280-adsp-pil.yaml | 207 +++++++++++++++++++++
> 1 file changed, 207 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml
>
> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml
> new file mode 100644
> index 0000000..79ef3c0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml
> @@ -0,0 +1,207 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm SC7280 ADSP Peripheral Image Loader
> +
> +maintainers:
> + - Srinivasa Rao Mandadapu <[email protected]>
> +
> +description:
> + This document describes the hardware for a component that loads and boots firmware
> + on the Qualcomm Technology Inc. ADSP.
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,sc7280-adsp-pil
> +
> + reg:
> + minItems: 1
> + items:
> + - description: qdsp6ss register
> + - description: efuse q6ss register

Why second IO address space is optional?

> +
> + interrupts:
> + items:
> + - description: Watchdog interrupt
> + - description: Fatal interrupt
> + - description: Ready interrupt
> + - description: Handover interrupt
> + - description: Stop acknowledge interrupt
> + - description: Shutdown acknowledge interrupt
> +
> + interrupt-names:
> + items:
> + - const: wdog
> + - const: fatal
> + - const: ready
> + - const: handover
> + - const: stop-ack
> + - const: shutdown-ack
> +
> + clocks:
> + items:
> + - description: XO clock
> + - description: GCC CFG NOC LPASS clock
> +
> + clock-names:
> + items:
> + - const: xo
> + - const: gcc_cfg_noc_lpass
> +
> + power-domains:
> + items:
> + - description: LCX power domain
> +
> + resets:
> + items:
> + - description: PDC AUDIO SYNC RESET
> + - description: CC LPASS restart
> +
> + reset-names:
> + items:
> + - const: pdc_sync
> + - const: cc_lpass
> +
> + memory-region:
> + maxItems: 1
> + description: Reference to the reserved-memory for the Hexagon core
> +
> + qcom,halt-regs:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + Phandle reference to a syscon representing TCSR followed by the
> + four offsets within syscon for q6, CE, AXI and qv6 halt registers.
> + items:
> + items:

This has to be strictly defined, IOW, the second items must be already
an item of previous list. Look at the other mss-pil.

> + - description: phandle to TCSR MUTEX
> + - description: offset to q6 halt registers
> + - description: offset to CE halt registers
> + - description: offset to AXI halt registers
> + - description: offset to qv6 halt registers
> +
> + qcom,smem-states:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description: States used by the AP to signal the Hexagon core
> + items:
> + - description: Stop the modem
> +
> + qcom,smem-state-names:
> + description: The names of the state bits used for SMP2P output
> + const: stop
> +
> + qcom,qmp:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: Reference to the AOSS side-channel message RAM.
> +
> + glink-edge:
> + type: object

Missing ref to glink-edge and unevaluatedProperties:false. Please take a
look at recent
Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml

> + description: |
> + Qualcomm G-Link subnode which represents communication edge, channels
> + and devices related to the ADSP.
> +
> + properties:
> + interrupts:
> + items:
> + - description: IRQ from ADSP to GLINK

Skip interrupts and mboxes - both are coming from glink-edge.

> +
> + mboxes:
> + items:
> + - description: Mailbox for communication between APPS and ADSP
> +
> + label:
> + description: The names of the state bits used for SMP2P output

Skip description

> + items:
> + - const: lpass

No items, just const: lpass

> +
> + qcom,remote-pid:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: ID of the shared memory used by GLINK for communication with ADSP

This can be dropped.

> +
> + gpr: true
> + apr: false
> + fastrpc: false


BTW, all these three do not make sense without ref to glink-edge. After
adding ref, these seem reasonable.

> +
> + required:
> + - interrupts
> + - mboxes
> + - label
> + - qcom,remote-pid
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - interrupt-names
> + - clocks
> + - clock-names
> + - power-domains
> + - resets
> + - reset-names
> + - qcom,halt-regs
> + - memory-region
> + - qcom,smem-states
> + - qcom,smem-state-names
> + - qcom,qmp
> +
> +additionalProperties: false

Best regards,
Krzysztof

2022-09-27 14:12:24

by Srinivasa Rao Mandadapu

[permalink] [raw]
Subject: Re: [PATCH v8 1/7] dt-bindings: remoteproc: qcom: Add SC7280 ADSP support


On 9/23/2022 10:53 PM, Krzysztof Kozlowski wrote:
Thanks for Your time Krzyszto!!!
> On 23/09/2022 15:05, Srinivasa Rao Mandadapu wrote:
>> Add ADSP PIL loading support for SC7280 SoCs.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
>> Reviewed-by: Rob Herring <[email protected]>
>> Reviewed-by: Stephen Boyd <[email protected]>
>> ---
>> Changes since V7:
>> -- Remove redundant clocks in dt bindings.
>> -- Fix dt compilation error in dt bindings.
>> Changes since V6:
>> -- Update glink-edge property.
>> -- Add qcom,qmp property.
>> Changes since V5:
>> -- Remove qcom,adsp-memory-regions property.
>> Changes since V4:
>> -- Update halt registers description in dt bindings.
>>
>> .../bindings/remoteproc/qcom,sc7280-adsp-pil.yaml | 207 +++++++++++++++++++++
>> 1 file changed, 207 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml
>> new file mode 100644
>> index 0000000..79ef3c0
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml
>> @@ -0,0 +1,207 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm SC7280 ADSP Peripheral Image Loader
>> +
>> +maintainers:
>> + - Srinivasa Rao Mandadapu <[email protected]>
>> +
>> +description:
>> + This document describes the hardware for a component that loads and boots firmware
>> + on the Qualcomm Technology Inc. ADSP.
>> +
>> +properties:
>> + compatible:
>> + enum:
>> + - qcom,sc7280-adsp-pil
>> +
>> + reg:
>> + minItems: 1
>> + items:
>> + - description: qdsp6ss register
>> + - description: efuse q6ss register
> Why second IO address space is optional?
Yeah, both are required for SC7280. will remove minItems.
>
>> +
>> + interrupts:
>> + items:
>> + - description: Watchdog interrupt
>> + - description: Fatal interrupt
>> + - description: Ready interrupt
>> + - description: Handover interrupt
>> + - description: Stop acknowledge interrupt
>> + - description: Shutdown acknowledge interrupt
>> +
>> + interrupt-names:
>> + items:
>> + - const: wdog
>> + - const: fatal
>> + - const: ready
>> + - const: handover
>> + - const: stop-ack
>> + - const: shutdown-ack
>> +
>> + clocks:
>> + items:
>> + - description: XO clock
>> + - description: GCC CFG NOC LPASS clock
>> +
>> + clock-names:
>> + items:
>> + - const: xo
>> + - const: gcc_cfg_noc_lpass
>> +
>> + power-domains:
>> + items:
>> + - description: LCX power domain
>> +
>> + resets:
>> + items:
>> + - description: PDC AUDIO SYNC RESET
>> + - description: CC LPASS restart
>> +
>> + reset-names:
>> + items:
>> + - const: pdc_sync
>> + - const: cc_lpass
>> +
>> + memory-region:
>> + maxItems: 1
>> + description: Reference to the reserved-memory for the Hexagon core
>> +
>> + qcom,halt-regs:
>> + $ref: /schemas/types.yaml#/definitions/phandle-array
>> + description:
>> + Phandle reference to a syscon representing TCSR followed by the
>> + four offsets within syscon for q6, CE, AXI and qv6 halt registers.
>> + items:
>> + items:
> This has to be strictly defined, IOW, the second items must be already
> an item of previous list. Look at the other mss-pil.
Okay. Will modify as per mss-pil.
>
>> + - description: phandle to TCSR MUTEX
>> + - description: offset to q6 halt registers
>> + - description: offset to CE halt registers
>> + - description: offset to AXI halt registers
>> + - description: offset to qv6 halt registers
>> +
>> + qcom,smem-states:
>> + $ref: /schemas/types.yaml#/definitions/phandle-array
>> + description: States used by the AP to signal the Hexagon core
>> + items:
>> + - description: Stop the modem
>> +
>> + qcom,smem-state-names:
>> + description: The names of the state bits used for SMP2P output
>> + const: stop
>> +
>> + qcom,qmp:
>> + $ref: /schemas/types.yaml#/definitions/phandle
>> + description: Reference to the AOSS side-channel message RAM.
>> +
>> + glink-edge:
>> + type: object
> Missing ref to glink-edge and unevaluatedProperties:false. Please take a
> look at recent
> Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml
Okay. Will add reference to glink-edge.
>
>> + description: |
>> + Qualcomm G-Link subnode which represents communication edge, channels
>> + and devices related to the ADSP.
>> +
>> + properties:
>> + interrupts:
>> + items:
>> + - description: IRQ from ADSP to GLINK
> Skip interrupts and mboxes - both are coming from glink-edge.
Okay. Will remove it. But Same is followed in mss-pil
>
>> +
>> + mboxes:
>> + items:
>> + - description: Mailbox for communication between APPS and ADSP
>> +
>> + label:
>> + description: The names of the state bits used for SMP2P output
> Skip description
Okay.
>
>> + items:
>> + - const: lpass
> No items, just const: lpass
Okay.
>
>> +
>> + qcom,remote-pid:
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + description: ID of the shared memory used by GLINK for communication with ADSP
> This can be dropped.
Okay. Will remove qcom,remote-pid.
>
>> +
>> + gpr: true
>> + apr: false
>> + fastrpc: false
>
> BTW, all these three do not make sense without ref to glink-edge. After
> adding ref, these seem reasonable.
Okay. will add glink-edge reference.
>
>> +
>> + required:
>> + - interrupts
>> + - mboxes
>> + - label
>> + - qcom,remote-pid
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - interrupts
>> + - interrupt-names
>> + - clocks
>> + - clock-names
>> + - power-domains
>> + - resets
>> + - reset-names
>> + - qcom,halt-regs
>> + - memory-region
>> + - qcom,smem-states
>> + - qcom,smem-state-names
>> + - qcom,qmp
>> +
>> +additionalProperties: false
> Best regards,
> Krzysztof
>