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[71.56.157.77]) by smtp.gmail.com with ESMTPSA id o1-20020a17090a168100b001fa8b909ef0sm2249487pja.7.2022.08.26.17.05.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Aug 2022 17:05:49 -0700 (PDT) From: Luiz Augusto von Dentz To: linux-bluetooth@vger.kernel.org Subject: [PATCH v3 05/11] shared: Add definition for LC3 codec Date: Fri, 26 Aug 2022 17:05:34 -0700 Message-Id: <20220827000540.113414-6-luiz.dentz@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220827000540.113414-1-luiz.dentz@gmail.com> References: <20220827000540.113414-1-luiz.dentz@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-bluetooth@vger.kernel.org From: Luiz Augusto von Dentz This adds the definition for LC3 codec capabilities and configuration. --- Makefile.am | 2 +- src/shared/lc3.h | 112 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 113 insertions(+), 1 deletion(-) create mode 100644 src/shared/lc3.h diff --git a/Makefile.am b/Makefile.am index 92758ca55816..960bf21bc726 100644 --- a/Makefile.am +++ b/Makefile.am @@ -231,7 +231,7 @@ shared_sources = src/shared/io.h src/shared/timeout.h \ src/shared/gap.h src/shared/gap.c \ src/shared/log.h src/shared/log.c \ src/shared/bap.h src/shared/bap.c src/shared/ascs.h \ - src/shared/tty.h + src/shared/lc3.h src/shared/tty.h if READLINE shared_sources += src/shared/shell.c src/shared/shell.h diff --git a/src/shared/lc3.h b/src/shared/lc3.h new file mode 100644 index 000000000000..33e8107e39e6 --- /dev/null +++ b/src/shared/lc3.h @@ -0,0 +1,112 @@ +/* SPDX-License-Identifier: LGPL-2.1-or-later */ +/* + * + * BlueZ - Bluetooth protocol stack for Linux + * + * Copyright (C) 2020 Intel Corporation. All rights reserved. + * + */ + +#define LTV(_type, _bytes...) \ + { \ + .len = 1 + sizeof((uint8_t []) { _bytes }), \ + .type = _type, \ + .data = { _bytes }, \ + } + +#define LC3_ID 0x06 + +#define LC3_BASE 0x01 + +#define LC3_FREQ (LC3_BASE) +#define LC3_FREQ_8KHZ BIT(0) +#define LC3_FREQ_11KHZ BIT(1) +#define LC3_FREQ_16KHZ BIT(2) +#define LC3_FREQ_22KHZ BIT(3) +#define LC3_FREQ_24KHZ BIT(4) +#define LC3_FREQ_32KHZ BIT(5) +#define LC3_FREQ_44KHZ BIT(6) +#define LC3_FREQ_48KHZ BIT(7) +#define LC3_FREQ_ANY (LC3_FREQ_8KHZ | \ + LC3_FREQ_11KHZ | \ + LC3_FREQ_16KHZ | \ + LC3_FREQ_22KHZ | \ + LC3_FREQ_24KHZ | \ + LC3_FREQ_32KHZ | \ + LC3_FREQ_44KHZ | \ + LC3_FREQ_48KHZ) + +#define LC3_DURATION (LC3_BASE + 1) +#define LC3_DURATION_7_5 BIT(0) +#define LC3_DURATION_10 BIT(1) +#define LC3_DURATION_ANY (LC3_DURATION_7_5 | LC3_DURATION_10) +#define LC3_DURATION_PREFER_7_5 BIT(4) +#define LC3_DURATION_PREFER_10 BIT(5) + + +#define LC3_CHAN_COUNT (LC3_BASE + 2) +#define LC3_CHAN_COUNT_SUPPORT BIT(0) + +#define LC3_FRAME_LEN (LC3_BASE + 3) + +#define LC3_FRAME_COUNT (LC3_BASE + 4) + +#define LC3_CAPABILITIES(_freq, _duration, _chan_count, _len_min, _len_max) \ + { \ + LTV(LC3_FREQ, _freq), \ + LTV(LC3_DURATION, _duration), \ + LTV(LC3_CHAN_COUNT, _chan_count), \ + LTV(LC3_FRAME_LEN, _len_min, _len_min >> 8, \ + _len_max, _len_max >> 8), \ + } + +#define LC3_CONFIG_BASE 0x01 + +#define LC3_CONFIG_FREQ (LC3_CONFIG_BASE) +#define LC3_CONFIG_FREQ_8KHZ 0x01 +#define LC3_CONFIG_FREQ_11KHZ 0x02 +#define LC3_CONFIG_FREQ_16KHZ 0x03 +#define LC3_CONFIG_FREQ_22KHZ 0x04 +#define LC3_CONFIG_FREQ_24KHZ 0x05 +#define LC3_CONFIG_FREQ_32KHZ 0x06 +#define LC3_CONFIG_FREQ_44KHZ 0x07 +#define LC3_CONFIG_FREQ_48KHZ 0x08 + +#define LC3_CONFIG_DURATION (LC3_CONFIG_BASE + 1) +#define LC3_CONFIG_DURATION_7_5 0x00 +#define LC3_CONFIG_DURATION_10 0x01 + +#define LC3_CONFIG_CHAN_ALLOC (LC3_CONFIG_BASE + 2) + +#define LC3_CONFIG_FRAME_LEN (LC3_CONFIG_BASE + 3) + +#define LC3_CONFIG(_freq, _duration, _len) \ + { \ + LTV(LC3_CONFIG_FREQ, _freq), \ + LTV(LC3_CONFIG_DURATION, _duration), \ + LTV(LC3_CONFIG_FRAME_LEN, _len, _len >> 8), \ + } + +#define LC3_CONFIG_8KHZ(_duration, _len) \ + LC3_CONFIG(LC3_CONFIG_FREQ_8KHZ, _duration, _len) + +#define LC3_CONFIG_11KHZ(_duration, _len) \ + LC3_CONFIG(LC3_CONFIG_FREQ_11KHZ, _duration, _len) + +#define LC3_CONFIG_16KHZ(_duration, _len) \ + LC3_CONFIG(LC3_CONFIG_FREQ_16KHZ, _duration, _len) + +#define LC3_CONFIG_22KHZ(_duration, _len) \ + LC3_CONFIG(LC3_CONFIG_FREQ_22KHZ, _duration, _len) + +#define LC3_CONFIG_24KHZ(_duration, _len) \ + LC3_CONFIG(LC3_CONFIG_FREQ_24KHZ, _duration, _len) + +#define LC3_CONFIG_32KHZ(_duration, _len) \ + LC3_CONFIG(LC3_CONFIG_FREQ_32KHZ, _duration, _len) + +#define LC3_CONFIG_44KHZ(_duration, _len) \ + LC3_CONFIG(LC3_CONFIG_FREQ_44KHZ, _duration, _len) + +#define LC3_CONFIG_48KHZ(_duration, _len) \ + LC3_CONFIG(LC3_CONFIG_FREQ_48KHZ, _duration, _len) -- 2.37.2