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[23.128.96.18]) by mx.google.com with ESMTP id g21si1186971ejf.645.2021.03.31.03.00.58; Wed, 31 Mar 2021 03:01:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-embedded-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-embedded-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-embedded-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235026AbhCaKA0 (ORCPT + 89 others); Wed, 31 Mar 2021 06:00:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234984AbhCaJ7v (ORCPT ); Wed, 31 Mar 2021 05:59:51 -0400 Received: from andre.telenet-ops.be (andre.telenet-ops.be [IPv6:2a02:1800:120:4::f00:15]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DFA97C06175F for ; Wed, 31 Mar 2021 02:59:50 -0700 (PDT) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed20:ada2:b4da:6568:5ad5]) by andre.telenet-ops.be with bizsmtp id mxzc2400c5W9KJv01xzcoU; Wed, 31 Mar 2021 11:59:49 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1lRXdQ-00BseR-3H; Wed, 31 Mar 2021 11:59:36 +0200 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1lRXdP-001cdD-ED; Wed, 31 Mar 2021 11:59:35 +0200 From: Geert Uytterhoeven To: Joerg Roedel , Will Deacon , Steven Rostedt , Ingo Molnar , Petr Mladek , Sergey Senozhatsky Cc: Linus Torvalds , Andrew Morton , Andy Shevchenko , Rasmus Villemoes , John Ogness , Gary R Hook , Marco Elver , Randy Dunlap , Vlastimil Babka , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, linux-embedded@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH] clk: Align provider-specific CLK_* bit definitions Date: Wed, 31 Mar 2021 11:59:19 +0200 Message-Id: <505e19bac2deb6015e76391ce7ad044c43499681.1617184676.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-embedded@vger.kernel.org The definition of CLK_MULTIPLIER_ROUND_CLOSEST is not aligned to the two bit definitions next to it. A deeper inspection reveals that the alignment of CLK_MULTIPLIER_ROUND_CLOSEST does match the most common alignment. Align the bit definitions for the various provider types throughout the file at 40 columns, to increase uniformity. Signed-off-by: Geert Uytterhoeven --- include/linux/clk-provider.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 58f6fe866ae9b797..8f37829565f9640e 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -342,7 +342,7 @@ struct clk_fixed_rate { unsigned long flags; }; -#define CLK_FIXED_RATE_PARENT_ACCURACY BIT(0) +#define CLK_FIXED_RATE_PARENT_ACCURACY BIT(0) extern const struct clk_ops clk_fixed_rate_ops; struct clk_hw *__clk_hw_register_fixed_rate(struct device *dev, @@ -984,8 +984,8 @@ struct clk_fractional_divider { #define to_clk_fd(_hw) container_of(_hw, struct clk_fractional_divider, hw) -#define CLK_FRAC_DIVIDER_ZERO_BASED BIT(0) -#define CLK_FRAC_DIVIDER_BIG_ENDIAN BIT(1) +#define CLK_FRAC_DIVIDER_ZERO_BASED BIT(0) +#define CLK_FRAC_DIVIDER_BIG_ENDIAN BIT(1) extern const struct clk_ops clk_fractional_divider_ops; struct clk *clk_register_fractional_divider(struct device *dev, @@ -1033,9 +1033,9 @@ struct clk_multiplier { #define to_clk_multiplier(_hw) container_of(_hw, struct clk_multiplier, hw) -#define CLK_MULTIPLIER_ZERO_BYPASS BIT(0) +#define CLK_MULTIPLIER_ZERO_BYPASS BIT(0) #define CLK_MULTIPLIER_ROUND_CLOSEST BIT(1) -#define CLK_MULTIPLIER_BIG_ENDIAN BIT(2) +#define CLK_MULTIPLIER_BIG_ENDIAN BIT(2) extern const struct clk_ops clk_multiplier_ops; -- 2.25.1