Hello
The main goal of this serie is to add support for TRNG, PRNG and hashes
to the sun8i-ss/sun8i-ce driver.
The whole serie is tested with CRYPTO_EXTRA_TESTS enabled and loading
tcrypt.
The PRNG and TRNG are tested with rngtest.
Both LE and BE kernel are tested.
This serie was tested on:
- sun50i-a64-pine64
- sun8i-a83t-bananapi-m3
- sun8i-r40-bananapi-m2-ultra
- sun50i-h5-libretech-all-h3-cc
- sun8i-h3-orangepi-pc
Regards
Change since v1:
- removed _crypto_rng_cast patch
Change since v2:
- cleaned unused variables from sun8i-ce-prng
- added some missing memzero_explicit
Change since v3:
- rebased on latest next
- removed useless cpu_to_le32() in sun8i-ss
- added 2 last patches
- add handle endianness of t_common_ctl patch
Change since v4:
- added a style issue patch
Changes since v5:
- handle failure pattern of pm_runtime_get_sync
- Add missing linux/dma-mapping.h
Changes since v6:
- fix sparse error in sun8i-ce-cipher.c
Corentin Labbe (17):
crypto: sun8i-ss: Add SS_START define
crypto: sun8i-ss: Add support for the PRNG
crypto: sun8i-ss: support hash algorithms
crypto: sun8i-ss: fix a trivial typo
crypto: sun8i-ss: Add more comment on some structures
crypto: sun8i-ss: better debug printing
crypto: sun8i-ce: handle endianness of t_common_ctl
crypto: sun8i-ce: move iv data to request context
crypto: sun8i-ce: split into prepare/run/unprepare
crypto: sun8i-ce: handle different error registers
crypto: sun8i-ce: rename has_t_dlen_in_bytes to cipher_t_dlen_in_bytes
crypto: sun8i-ce: support hash algorithms
crypto: sun8i-ce: Add stat_bytes debugfs
crypto: sun8i-ce: Add support for the PRNG
crypto: sun8i-ce: Add support for the TRNG
crypto: sun8i-ce: fix comparison of integer expressions of different
signedness
crypto: sun8i-ss: fix comparison of integer expressions of different
signedness
drivers/crypto/allwinner/Kconfig | 43 ++
drivers/crypto/allwinner/sun8i-ce/Makefile | 3 +
.../allwinner/sun8i-ce/sun8i-ce-cipher.c | 116 +++--
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 381 ++++++++++++++-
.../crypto/allwinner/sun8i-ce/sun8i-ce-hash.c | 413 ++++++++++++++++
.../crypto/allwinner/sun8i-ce/sun8i-ce-prng.c | 164 +++++++
.../crypto/allwinner/sun8i-ce/sun8i-ce-trng.c | 127 +++++
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 139 +++++-
drivers/crypto/allwinner/sun8i-ss/Makefile | 2 +
.../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 205 +++++++-
.../crypto/allwinner/sun8i-ss/sun8i-ss-hash.c | 444 ++++++++++++++++++
.../crypto/allwinner/sun8i-ss/sun8i-ss-prng.c | 173 +++++++
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 89 +++-
13 files changed, 2240 insertions(+), 59 deletions(-)
create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c
create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-prng.c
create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c
create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c
create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-prng.c
--
2.26.2
Instead of using an hardcoded value, let's use a defined value for
SS_START.
Signed-off-by: Corentin Labbe <[email protected]>
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 2 +-
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 9a23515783a6..97012128385f 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -61,7 +61,7 @@ int sun8i_ss_run_task(struct sun8i_ss_dev *ss, struct sun8i_cipher_req_ctx *rctx
const char *name)
{
int flow = rctx->flow;
- u32 v = 1;
+ u32 v = SS_START;
int i;
#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
index 0405767f1f7e..f3ffaea3a59f 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
@@ -13,6 +13,8 @@
#include <linux/debugfs.h>
#include <linux/crypto.h>
+#define SS_START 1
+
#define SS_ENCRYPTION 0
#define SS_DECRYPTION BIT(6)
--
2.26.2
Error registers are different across SoCs.
This patch handle those difference.
Signed-off-by: Corentin Labbe <[email protected]>
---
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 62 ++++++++++++++++---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 8 +++
2 files changed, 62 insertions(+), 8 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 08ed1ca12baf..65748dfa7a48 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -40,7 +40,8 @@ static const struct ce_variant ce_h3_variant = {
.ce_clks = {
{ "bus", 0, 200000000 },
{ "mod", 50000000, 0 },
- }
+ },
+ .esr = ESR_H3,
};
static const struct ce_variant ce_h5_variant = {
@@ -51,7 +52,8 @@ static const struct ce_variant ce_h5_variant = {
.ce_clks = {
{ "bus", 0, 200000000 },
{ "mod", 300000000, 0 },
- }
+ },
+ .esr = ESR_H5,
};
static const struct ce_variant ce_h6_variant = {
@@ -64,7 +66,8 @@ static const struct ce_variant ce_h6_variant = {
{ "bus", 0, 200000000 },
{ "mod", 300000000, 0 },
{ "ram", 0, 400000000 },
- }
+ },
+ .esr = ESR_H6,
};
static const struct ce_variant ce_a64_variant = {
@@ -75,7 +78,8 @@ static const struct ce_variant ce_a64_variant = {
.ce_clks = {
{ "bus", 0, 200000000 },
{ "mod", 300000000, 0 },
- }
+ },
+ .esr = ESR_A64,
};
static const struct ce_variant ce_r40_variant = {
@@ -86,7 +90,8 @@ static const struct ce_variant ce_r40_variant = {
.ce_clks = {
{ "bus", 0, 200000000 },
{ "mod", 300000000, 0 },
- }
+ },
+ .esr = ESR_R40,
};
/*
@@ -102,6 +107,7 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow, const char *name)
{
u32 v;
int err = 0;
+ struct ce_task *cet = ce->chanlist[flow].tl;
#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
ce->chanlist[flow].stat_req++;
@@ -131,19 +137,56 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow, const char *name)
msecs_to_jiffies(ce->chanlist[flow].timeout));
if (ce->chanlist[flow].status == 0) {
- dev_err(ce->dev, "DMA timeout for %s\n", name);
+ dev_err(ce->dev, "DMA timeout for %s (tm=%d) on flow %d\n", name,
+ ce->chanlist[flow].timeout, flow);
err = -EFAULT;
}
/* No need to lock for this read, the channel is locked so
* nothing could modify the error value for this channel
*/
v = readl(ce->base + CE_ESR);
- if (v) {
+ switch (ce->variant->esr) {
+ case ESR_H3:
+ /* Sadly, the error bit is not per flow */
+ if (v) {
+ dev_err(ce->dev, "CE ERROR: %x for flow %x\n", v, flow);
+ err = -EFAULT;
+ print_hex_dump(KERN_INFO, "TASK: ", DUMP_PREFIX_NONE, 16, 4,
+ cet, sizeof(struct ce_task), false);
+ }
+ if (v & CE_ERR_ALGO_NOTSUP)
+ dev_err(ce->dev, "CE ERROR: algorithm not supported\n");
+ if (v & CE_ERR_DATALEN)
+ dev_err(ce->dev, "CE ERROR: data length error\n");
+ if (v & CE_ERR_KEYSRAM)
+ dev_err(ce->dev, "CE ERROR: keysram access error for AES\n");
+ break;
+ case ESR_A64:
+ case ESR_H5:
+ case ESR_R40:
v >>= (flow * 4);
+ v &= 0xF;
+ if (v) {
+ dev_err(ce->dev, "CE ERROR: %x for flow %x\n", v, flow);
+ err = -EFAULT;
+ print_hex_dump(KERN_INFO, "TASK: ", DUMP_PREFIX_NONE, 16, 4,
+ cet, sizeof(struct ce_task), false);
+ }
+ if (v & CE_ERR_ALGO_NOTSUP)
+ dev_err(ce->dev, "CE ERROR: algorithm not supported\n");
+ if (v & CE_ERR_DATALEN)
+ dev_err(ce->dev, "CE ERROR: data length error\n");
+ if (v & CE_ERR_KEYSRAM)
+ dev_err(ce->dev, "CE ERROR: keysram access error for AES\n");
+ break;
+ case ESR_H6:
+ v >>= (flow * 8);
v &= 0xFF;
if (v) {
dev_err(ce->dev, "CE ERROR: %x for flow %x\n", v, flow);
err = -EFAULT;
+ print_hex_dump(KERN_INFO, "TASK: ", DUMP_PREFIX_NONE, 16, 4,
+ cet, sizeof(struct ce_task), false);
}
if (v & CE_ERR_ALGO_NOTSUP)
dev_err(ce->dev, "CE ERROR: algorithm not supported\n");
@@ -153,7 +196,10 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow, const char *name)
dev_err(ce->dev, "CE ERROR: keysram access error for AES\n");
if (v & CE_ERR_ADDR_INVALID)
dev_err(ce->dev, "CE ERROR: address invalid\n");
- }
+ if (v & CE_ERR_KEYLADDER)
+ dev_err(ce->dev, "CE ERROR: key ladder configuration error\n");
+ break;
+ }
return err;
}
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
index c3053326afe9..6e191d1fa140 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
@@ -65,6 +65,12 @@
#define CE_ERR_ADDR_INVALID BIT(5)
#define CE_ERR_KEYLADDER BIT(6)
+#define ESR_H3 0
+#define ESR_A64 1
+#define ESR_R40 2
+#define ESR_H5 3
+#define ESR_H6 4
+
#define CE_DIE_ID_SHIFT 16
#define CE_DIE_ID_MASK 0x07
@@ -94,12 +100,14 @@ struct ce_clock {
* @has_t_dlen_in_bytes: Does the request size for cipher is in
* bytes or words
* @ce_clks: list of clocks needed by this variant
+ * @esr: The type of error register
*/
struct ce_variant {
char alg_cipher[CE_ID_CIPHER_MAX];
u32 op_mode[CE_ID_OP_MAX];
bool has_t_dlen_in_bytes;
struct ce_clock ce_clks[CE_MAX_CLOCKS];
+ int esr;
};
struct sginfo {
--
2.26.2
On Fri, Sep 18, 2020 at 07:22:58AM +0000, Corentin Labbe wrote:
> Hello
>
> The main goal of this serie is to add support for TRNG, PRNG and hashes
> to the sun8i-ss/sun8i-ce driver.
> The whole serie is tested with CRYPTO_EXTRA_TESTS enabled and loading
> tcrypt.
> The PRNG and TRNG are tested with rngtest.
> Both LE and BE kernel are tested.
>
> This serie was tested on:
> - sun50i-a64-pine64
> - sun8i-a83t-bananapi-m3
> - sun8i-r40-bananapi-m2-ultra
> - sun50i-h5-libretech-all-h3-cc
> - sun8i-h3-orangepi-pc
>
> Regards
>
> Change since v1:
> - removed _crypto_rng_cast patch
>
> Change since v2:
> - cleaned unused variables from sun8i-ce-prng
> - added some missing memzero_explicit
>
> Change since v3:
> - rebased on latest next
> - removed useless cpu_to_le32() in sun8i-ss
> - added 2 last patches
> - add handle endianness of t_common_ctl patch
>
> Change since v4:
> - added a style issue patch
>
> Changes since v5:
> - handle failure pattern of pm_runtime_get_sync
> - Add missing linux/dma-mapping.h
>
> Changes since v6:
> - fix sparse error in sun8i-ce-cipher.c
>
> Corentin Labbe (17):
> crypto: sun8i-ss: Add SS_START define
> crypto: sun8i-ss: Add support for the PRNG
> crypto: sun8i-ss: support hash algorithms
> crypto: sun8i-ss: fix a trivial typo
> crypto: sun8i-ss: Add more comment on some structures
> crypto: sun8i-ss: better debug printing
> crypto: sun8i-ce: handle endianness of t_common_ctl
> crypto: sun8i-ce: move iv data to request context
> crypto: sun8i-ce: split into prepare/run/unprepare
> crypto: sun8i-ce: handle different error registers
> crypto: sun8i-ce: rename has_t_dlen_in_bytes to cipher_t_dlen_in_bytes
> crypto: sun8i-ce: support hash algorithms
> crypto: sun8i-ce: Add stat_bytes debugfs
> crypto: sun8i-ce: Add support for the PRNG
> crypto: sun8i-ce: Add support for the TRNG
> crypto: sun8i-ce: fix comparison of integer expressions of different
> signedness
> crypto: sun8i-ss: fix comparison of integer expressions of different
> signedness
>
> drivers/crypto/allwinner/Kconfig | 43 ++
> drivers/crypto/allwinner/sun8i-ce/Makefile | 3 +
> .../allwinner/sun8i-ce/sun8i-ce-cipher.c | 116 +++--
> .../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 381 ++++++++++++++-
> .../crypto/allwinner/sun8i-ce/sun8i-ce-hash.c | 413 ++++++++++++++++
> .../crypto/allwinner/sun8i-ce/sun8i-ce-prng.c | 164 +++++++
> .../crypto/allwinner/sun8i-ce/sun8i-ce-trng.c | 127 +++++
> drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 139 +++++-
> drivers/crypto/allwinner/sun8i-ss/Makefile | 2 +
> .../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 205 +++++++-
> .../crypto/allwinner/sun8i-ss/sun8i-ss-hash.c | 444 ++++++++++++++++++
> .../crypto/allwinner/sun8i-ss/sun8i-ss-prng.c | 173 +++++++
> drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 89 +++-
> 13 files changed, 2240 insertions(+), 59 deletions(-)
> create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c
> create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-prng.c
> create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c
> create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c
> create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-prng.c
All applied. Thanks.
--
Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt