2021-12-11 08:51:20

by Yang Shen

Subject: [PATCH] crypto: hisilicon/zip - enable ssid for sva sgl

For Kunpeng 920, the bit 0 of register 'HZIP_SGL_RUSER_32_63' stand for
whether the ssid is valid. So this bit should be set as valid for sva mode.

Signed-off-by: Yang Shen <[email protected]>
---
drivers/crypto/hisilicon/zip/zip_main.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c
index 1a237d95d482..7fd302ae4fc5 100644
--- a/drivers/crypto/hisilicon/zip/zip_main.c
+++ b/drivers/crypto/hisilicon/zip/zip_main.c
@@ -364,15 +364,16 @@ static int hisi_zip_set_user_domain_and_cache(struct hisi_qm *qm)

/* user domain configurations */
writel(AXUSER_BASE, base + HZIP_BD_RUSER_32_63);
- writel(AXUSER_BASE, base + HZIP_SGL_RUSER_32_63);
writel(AXUSER_BASE, base + HZIP_BD_WUSER_32_63);

if (qm->use_sva && qm->ver == QM_HW_V2) {
writel(AXUSER_BASE | AXUSER_SSV, base + HZIP_DATA_RUSER_32_63);
writel(AXUSER_BASE | AXUSER_SSV, base + HZIP_DATA_WUSER_32_63);
+ writel(AXUSER_BASE | AXUSER_SSV, base + HZIP_SGL_RUSER_32_63);
} else {
writel(AXUSER_BASE, base + HZIP_DATA_RUSER_32_63);
writel(AXUSER_BASE, base + HZIP_DATA_WUSER_32_63);
+ writel(AXUSER_BASE, base + HZIP_SGL_RUSER_32_63);
}

/* let's open all compression/decompression cores */
--
2.33.0

2021-12-17 08:39:52

by Herbert Xu

Subject: Re: [PATCH] crypto: hisilicon/zip - enable ssid for sva sgl

On Sat, Dec 11, 2021 at 04:52:05PM +0800, Yang Shen wrote:
> For Kunpeng 920, the bit 0 of register 'HZIP_SGL_RUSER_32_63' stand for
> whether the ssid is valid. So this bit should be set as valid for sva mode.
>
> Signed-off-by: Yang Shen <[email protected]>
> ---
> drivers/crypto/hisilicon/zip/zip_main.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)

Patch applied. Thanks.
--
Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt