2022-02-09 12:03:06

by Corentin LABBE

[permalink] [raw]
Subject: [PATCH] dt-bindings: crypto: rockchip: fix a typo on crypto-controller

crypto-controller had a typo, fix it.

Signed-off-by: Corentin Labbe <[email protected]>
---
Documentation/devicetree/bindings/crypto/rockchip-crypto.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
index 5e2ba385b8c9..53e39d5f94e7 100644
--- a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
+++ b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
@@ -16,7 +16,7 @@ Required properties:

Examples:

- crypto: cypto-controller@ff8a0000 {
+ crypto: crypto-controller@ff8a0000 {
compatible = "rockchip,rk3288-crypto";
reg = <0xff8a0000 0x4000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
--
2.34.1



2022-02-09 14:06:59

by Heiko Stuebner

[permalink] [raw]
Subject: Re: [PATCH] dt-bindings: crypto: rockchip: fix a typo on crypto-controller

Hi Corentin,

Am Mittwoch, 9. Februar 2022, 11:17:21 CET schrieb Corentin Labbe:
> crypto-controller had a typo, fix it.
>
> Signed-off-by: Corentin Labbe <[email protected]>

the binding for the crypto-accelerator is pretty standard
without any crazy stuff, so you could also try to convert it
to the yaml format ;-)


Heiko

> ---
> Documentation/devicetree/bindings/crypto/rockchip-crypto.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> index 5e2ba385b8c9..53e39d5f94e7 100644
> --- a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> +++ b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> @@ -16,7 +16,7 @@ Required properties:
>
> Examples:
>
> - crypto: cypto-controller@ff8a0000 {
> + crypto: crypto-controller@ff8a0000 {
> compatible = "rockchip,rk3288-crypto";
> reg = <0xff8a0000 0x4000>;
> interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
>