2023-02-10 03:32:55

by Simon Richter

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Subject: ahash with hardware queue

Hi,

I have a SHA256 implementation in an FPGA that keeps the hash state in
internal registers, and uses DMA to read input data and return the hash
output.

First of all, the result of the hash is inaccessible by DMA, so I've had
to add a separate result queue with an interrupt bottom half handler
that copies the result back into the request. Is there a better way to
do this, e.g. a flag I can set to get a DMA accessible result buffer?

Second, the import/export APIs seem to be synchronous. I'd like to run
these through the normal request/result queues along with other
requests, but obviously returning -EINPROGRESS from export is a bad idea.

Can I make my export function synchronous by sleeping until the
completion interrupt arrives, or is that a bad idea?

I could possibly implement a synchronous interface by always returning
the current hash state in the result queue for each asynchronous
operation and updating the request in case an export request comes
along, is that really the best option?

Simon


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