From: Herbert Xu Subject: Re: [PATCH v2 2/2] crypto, x86: SSSE3 based SHA1 implementation for x86-64 Date: Thu, 11 Aug 2011 23:08:40 +0800 Message-ID: <20110811150840.GA14503@gondor.apana.org.au> References: <1311529994-7924-1-git-send-email-minipli@googlemail.com> <1311529994-7924-3-git-send-email-minipli@googlemail.com> <20110804064436.GA16247@gondor.apana.org.au> <4E43EC49.1040803@mit.edu> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Mathias Krause , "David S. Miller" , linux-crypto@vger.kernel.org, Maxim Locktyukhin , linux-kernel@vger.kernel.org To: Andy Lutomirski Return-path: Received: from helcar.apana.org.au ([209.40.204.226]:36240 "EHLO fornost.hengli.com.au" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752546Ab1HKPIx (ORCPT ); Thu, 11 Aug 2011 11:08:53 -0400 Content-Disposition: inline In-Reply-To: <4E43EC49.1040803@mit.edu> Sender: linux-crypto-owner@vger.kernel.org List-ID: On Thu, Aug 11, 2011 at 10:50:49AM -0400, Andy Lutomirski wrote: > >> This is pretty similar to the situation with the Intel AES code. >> Over there they solved it by using the asynchronous interface and >> deferring the processing to a work queue. > > I have vague plans to clean up extended state handling and make > kernel_fpu_begin work efficiently from any context. (i.e. the first > kernel_fpu_begin after a context switch could take up to ~60 ns on Sandy > Bridge, but further calls to kernel_fpu_begin would be a single branch.) This is all well and good but you still need to deal with the case of !irq_fpu_usable. Cheers, -- Email: Herbert Xu Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt