From: Naveen Krishna Chatradhi Subject: [PATCH 6/8 v4] ARM: dts: exynos5250/5420: add dt node for sss module Date: Wed, 15 Jan 2014 14:46:37 +0530 Message-ID: <1389777397-15193-1-git-send-email-ch.naveen@samsung.com> References: <1389243640-13282-1-git-send-email-ch.naveen@samsung.com> Cc: linux-kernel@vger.kernel.org, vzapolskiy@gmail.com, herbert@gondor.apana.org.au, naveenkrishna.ch@gmail.com, cpgs@samsung.com, tomasz.figa@gmail.com, Kukjin Kim To: linux-crypto@vger.kernel.org, linux-samsung-soc@vger.kernel.org Return-path: Received: from mailout2.samsung.com ([203.254.224.25]:21264 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751451AbaAOJQ0 (ORCPT ); Wed, 15 Jan 2014 04:16:26 -0500 In-reply-to: <1389243640-13282-1-git-send-email-ch.naveen@samsung.com> Sender: linux-crypto-owner@vger.kernel.org List-ID: This patch adds the device tree node for SSS module found on Exynos5420 and Exynos5250 Signed-off-by: Naveen Krishna Chatradhi Reviewed-by: Tomasz Figa TO: CC: Kukjin Kim CC: --- Changes since v3: 1. Modified the SSS clock ID as per dt-bindings for Exynos5250 in samsung-clk.git tree. arch/arm/boot/dts/exynos5250.dtsi | 8 ++++++++ arch/arm/boot/dts/exynos5420.dtsi | 10 ++++++++++ 2 files changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index c341e55..1d249df 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -704,4 +704,12 @@ io-channel-ranges; status = "disabled"; }; + + sss@10830000 { + compatible = "samsung,exynos4210-secss"; + reg = <0x10830000 0x10000>; + interrupts = <0 112 0>; + clocks = <&clock 348>; + clock-names = "secss"; + }; }; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 11dd202..56a3f3e 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -652,4 +652,14 @@ clocks = <&clock 319>, <&clock 318>; clock-names = "tmu_apbif", "tmu_triminfo_apbif"; }; + + sss@10830000 { + compatible = "samsung,exynos4210-secss"; + reg = <0x10830000 0x10000>; + interrupts = <0 112 0>; + clocks = <&clock 471>; + clock-names = "secss"; + samsung,power-domain = <&g2d_pd>; + }; + }; -- 1.7.9.5