From: Boris Brezillon Subject: Re: [PATCH] crypto: marvell/cesa: Improving code readability Date: Tue, 19 Apr 2016 17:19:00 +0200 Message-ID: <20160419171900.21563a54@bbrezillon> References: <1461078560-30924-1-git-send-email-romain.perier@free-electrons.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: Arnaud Ebalard , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement , Thomas Petazzoni , Nadav Haklai , Ofer Heifetz , linux-crypto@vger.kernel.org To: Romain Perier Return-path: Received: from down.free-electrons.com ([37.187.137.238]:54653 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932106AbcDSPTC (ORCPT ); Tue, 19 Apr 2016 11:19:02 -0400 In-Reply-To: <1461078560-30924-1-git-send-email-romain.perier@free-electrons.com> Sender: linux-crypto-owner@vger.kernel.org List-ID: On Tue, 19 Apr 2016 17:09:20 +0200 Romain Perier wrote: > When looking for available engines, the variable "engine" is > assigned to "&cesa->engines[i]" at the beginning of the for loop. Replacing > next occurences of "&cesa->engines[i]" by "engine" and in order to improve > readability. > > Signed-off-by: Romain Perier Acked-by: Boris Brezillon > --- > drivers/crypto/marvell/cesa.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marvell/cesa.c > index 80239ae..e8ef9fd 100644 > --- a/drivers/crypto/marvell/cesa.c > +++ b/drivers/crypto/marvell/cesa.c > @@ -475,18 +475,18 @@ static int mv_cesa_probe(struct platform_device *pdev) > engine->regs = cesa->regs + CESA_ENGINE_OFF(i); > > if (dram && cesa->caps->has_tdma) > - mv_cesa_conf_mbus_windows(&cesa->engines[i], dram); > + mv_cesa_conf_mbus_windows(engine, dram); > > - writel(0, cesa->engines[i].regs + CESA_SA_INT_STATUS); > + writel(0, engine->regs + CESA_SA_INT_STATUS); > writel(CESA_SA_CFG_STOP_DIG_ERR, > - cesa->engines[i].regs + CESA_SA_CFG); > + engine->regs + CESA_SA_CFG); > writel(engine->sram_dma & CESA_SA_SRAM_MSK, > - cesa->engines[i].regs + CESA_SA_DESC_P0); > + engine->regs + CESA_SA_DESC_P0); > > ret = devm_request_threaded_irq(dev, irq, NULL, mv_cesa_int, > IRQF_ONESHOT, > dev_name(&pdev->dev), > - &cesa->engines[i]); > + engine); > if (ret) > goto err_cleanup; > } -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com