From: Thomas Garnier Subject: Re: x86: PIE support and option to extend KASLR randomization Date: Fri, 22 Sep 2017 11:08:02 -0700 Message-ID: References: <20170816151235.oamkdva6cwpc4cex@gmail.com> <20170817080920.5ljlkktngw2cisfg@gmail.com> <20170825080443.tvvr6wzs362cjcuu@gmail.com> <20170921155919.skpyt7dutod5ul4t@gmail.com> <20170922163225.bfrd5myl6d7deiim@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Cc: Herbert Xu , "David S . Miller" , Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , Peter Zijlstra , Josh Poimboeuf , Arnd Bergmann , Matthias Kaehlcke , Boris Ostrovsky , Juergen Gross , Paolo Bonzini , =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= , Joerg Roedel , Tom Lendacky , Andy Lutomirski , Borislav Petkov , Brian Gerst , "Kirill A . Shutemov" , "Rafael J . Wysocki" , Len Brown , Pavel Machek , Tejun Heo , Christoph La To: Ingo Molnar Return-path: List-Post: List-Help: List-Unsubscribe: List-Subscribe: In-Reply-To: <20170922163225.bfrd5myl6d7deiim@gmail.com> List-Id: linux-crypto.vger.kernel.org On Fri, Sep 22, 2017 at 9:32 AM, Ingo Molnar wrote: > > * Thomas Garnier wrote: > >> On Thu, Sep 21, 2017 at 8:59 AM, Ingo Molnar wrote: >> > >> > ( Sorry about the delay in answering this. I could blame the delay on the merge >> > window, but in reality I've been procrastinating this is due to the permanent, >> > non-trivial impact PIE has on generated C code. ) >> > >> > * Thomas Garnier wrote: >> > >> >> 1) PIE sometime needs two instructions to represent a single >> >> instruction on mcmodel=kernel. >> > >> > What again is the typical frequency of this occurring in an x86-64 defconfig >> > kernel, with the very latest GCC? >> >> I am not sure what is the best way to measure that. > > If this is the dominant factor then 'sizeof vmlinux' ought to be enough: > >> With ORC: PIE .text is 0.814224% than baseline > > I.e. the overhead is +0.81% in both size and (roughly) in number of instructions > executed. > > BTW., I think things improved with ORC because with ORC we have RBP as an extra > register and with PIE we lose RBX - so register pressure in code generation is > lower. That make sense. > > Ok, I suspect we can try it, but my preconditions for merging it would be: > > 1) Linus doesn't NAK it (obviously) Of course. > 2) we first implement the additional entropy bits that Linus suggested. > > does this work for you? Sure, I can look at how feasible that is. If it is, can I send everything as part of the same patch set? The additional entropy would be enabled for all KASLR but PIE will be off-by-default of course. > > Thanks, > > Ingo -- Thomas