From: Casey Leedom Subject: Re: DMA error when sg->offset value is greater than PAGE_SIZE in Intel IOMMU Date: Wed, 27 Sep 2017 21:29:23 +0000 Message-ID: References: <20170925155430.GB131920@otc-nc-03> <6d2af675-7b97-6eaf-4daa-d7bf80a05923@chelsio.com> <437a9bd8-d4d6-22ca-1a64-1a3e73f1101a@arm.com> <20170927181802.3dcd7efb@m750.lan>,<20170927144847.GA95654@otc-nc-03> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Cc: Dan Williams , "Harsh Jain" , Herbert Xu , "linux-kernel@vger.kernel.org" , "iommu@lists.linux-foundation.org" , "linux-crypto@vger.kernel.org" , "dwmw2@infradead.org" , Michael Werner , "nd@arm.com" To: "Raj, Ashok" , Robin Murphy Return-path: Received: from mail-dm3nam03on0122.outbound.protection.outlook.com ([104.47.41.122]:33941 "EHLO NAM03-DM3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751801AbdI0V31 (ORCPT ); Wed, 27 Sep 2017 17:29:27 -0400 In-Reply-To: <20170927144847.GA95654@otc-nc-03> Content-Language: en-US Sender: linux-crypto-owner@vger.kernel.org List-ID: Hey Raj, Let us know if you need help in gathering more debugging information. Fo= r the time being we've decided to ERRATA the use of the Intel I/O MMU with IPsec till we Root Cause the issue. But this is still at the top of Harsh'= s bug list. =20 With Robin's comments, I'm almost sure that the: (iov_pfn + sg->offset) << VTD_PAGE_SHIFT) in your suggested patch is an issue. iov_pfn is a Page Frame Number and sg->offset is a Byte Offset. It feels like this should be: size_t page_off =3D sg->offset & ~VTD_PAGE_MASK; unsigned long pfn_off =3D sg->offset >> VTD_PAGE_MASK; ... sg->dma_address =3D ((dma_addr_t) (iov_pfn + pfn_off) << VTD_PAGE_SHIFT) + page_off; When Harsh tried your original patch, Harsh' test system wouldn't even boot= . Casey