From: Li Yang Subject: Re: [PATCH v2 03/12] soc: fsl: dpio: add frame list format support Date: Fri, 14 Sep 2018 18:26:48 -0500 Message-ID: References: <20180912085937.22489-1-horia.geanta@nxp.com> <20180912085937.22489-4-horia.geanta@nxp.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Cc: Herbert Xu , Stuart Yoder , Laurentiu Tudor , Roy Pledge , Catalin Marinas , Will Deacon , David Miller , aymen.sghaier@nxp.com, linux-crypto@vger.kernel.org, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , lkml To: Horia Geanta Return-path: In-Reply-To: <20180912085937.22489-4-horia.geanta@nxp.com> Sender: linux-kernel-owner@vger.kernel.org List-Id: linux-crypto.vger.kernel.org On Wed, Sep 12, 2018 at 4:02 AM Horia Geantă wrote: > > Add support for dpaa2_fd_list format, i.e. dpaa2_fl_entry structure > and accessors. > > Frame list entries (FLEs) are similar, but not identical to FDs: > + "F" (final) bit > - FMT[b'01] is reserved > - DD, SC, DROPP bits (covered by "FD compatibility" field in FLE case) > - FLC[5:0] not used for stashing > > Signed-off-by: Horia Geantă Acked-by: Li Yang > --- > include/soc/fsl/dpaa2-fd.h | 242 +++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 242 insertions(+) >