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From:   Kalyani Akula <kalyania@xilinx.com>
To:     Corentin Labbe <clabbe.montjoie@gmail.com>
CC:     "herbert@gondor.apana.org.au" <herbert@gondor.apana.org.au>,
        "kstewart@linuxfoundation.org" <kstewart@linuxfoundation.org>,
        "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
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        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
        Sarat Chand Savitala <saratcha@xilinx.com>
Subject: RE: [RFC PATCH V3 0/4] Add Xilinx's ZynqMP SHA3 driver support
Thread-Topic: [RFC PATCH V3 0/4] Add Xilinx's ZynqMP SHA3 driver support
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Date:   Thu, 2 May 2019 15:12:55 +0000
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 <20190502120012.GA19008@Red>
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Hi Corentin,

Please find my response inline.

> -----Original Message-----
> From: Corentin Labbe <clabbe.montjoie@gmail.com>
> Sent: Thursday, May 2, 2019 5:30 PM
> To: Kalyani Akula <kalyania@xilinx.com>
> Cc: herbert@gondor.apana.org.au; kstewart@linuxfoundation.org;
> gregkh@linuxfoundation.org; tglx@linutronix.de; pombredanne@nexb.com;
> linux-crypto@vger.kernel.org; linux-kernel@vger.kernel.org;
> netdev@vger.kernel.org; Sarat Chand Savitala <saratcha@xilinx.com>; Kalya=
ni
> Akula <kalyania@xilinx.com>
> Subject: Re: [RFC PATCH V3 0/4] Add Xilinx's ZynqMP SHA3 driver support
>=20
> On Thu, May 02, 2019 at 04:04:38PM +0530, Kalyani Akula wrote:
> > This patch set adds support for
> > - dt-binding docs for Xilinx ZynqMP SHA3 driver
> > - Adds communication layer support for sha_hash in zynqmp.c
> > - Adds Xilinx ZynqMP driver for SHA3 Algorithm
> > - Adds device tree node for ZynqMP SHA3 driver
> >
> > V3 Changes :
> > - Removed zynqmp_sha_import and export APIs.The reason as follows The
> > user space code does an accept on an already accepted FD when we
> > create AF_ALG socket and call accept on it, it calls af_alg_accept and
> > not hash_accept.
> > import and export APIs are called from hash_accept.
> > The flow is as below
> > accept--> af_alg_accept-->hash_accept_parent-->hash_accept_parent_noke
> > accept--> y
> > for hash salg_type.
> > - Resolved comments from
> >         https://patchwork.kernel.org/patch/10753719/
> >
>=20
>=20
> Your driver still doesnt handle the case where two hash are done in paral=
lel.
>=20

Our Firmware uses IPI protocol to send this SHA3 requests to SHA3 HW engine=
, which doesn't support parallel processing of 2 hash requests.
The flow is=20
SHA3 request from App -> SHA3 driver-> ZynqMp driver-> Firmware (which does=
n't support parallel processing of 2 requests) -> SHA3 HW Engine


> Furthermore, you miss the export/import functions.
>=20

When user space code does an accept on an already accepted FD as below
sockfd =3D socket(AF_ALG, SOCK_SEQPACKET, 0);
bind(sockfd, (struct sockaddr *)&sa, sizeof(sa));
fd =3D accept(sockfd, NULL, 0);

where my sockaddr is=20
struct sockaddr_alg sa =3D {
        .salg_family =3D AF_ALG,
        .salg_type =3D "hash",
        .salg_name =3D "xilinx-sha3-384"
 };

Upon calling accept the flow in the kernel is as mentioned
accept--> af_alg_accept-->hash_accept_parent-->hash_accept_parent_nokey
for hash salg_type.

And where import and export functions are called from hash_accept. hence, t=
hese functions never be called from the application.
So, I removed those from the driver.

Regards
Kalyani.

> Regards