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From:   Horia Geanta <horia.geanta@nxp.com>
To:     Herbert Xu <herbert@gondor.apana.org.au>
CC:     Ard Biesheuvel <ard.biesheuvel@linaro.org>,
        Eric Biggers <ebiggers@kernel.org>,
        Iuliana Prodan <iuliana.prodan@nxp.com>,
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        Sascha Hauer <s.hauer@pengutronix.de>,
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        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        dl-linux-imx <linux-imx@nxp.com>
Subject: Re: [PATCH] crypto: gcm - fix cacheline sharing
Thread-Topic: [PATCH] crypto: gcm - fix cacheline sharing
Thread-Index: AQHVFkF+dOvdDzZqYUSH856vNqfARw==
Date:   Fri, 31 May 2019 06:10:51 +0000
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On 5/31/2019 8:43 AM, Herbert Xu wrote:=0A=
> On Fri, May 31, 2019 at 05:22:50AM +0000, Horia Geanta wrote:=0A=
>>=0A=
>> Unless it's clearly defined *which* virtual addresses mustn't be accesse=
d,=0A=
>> things won't work properly.=0A=
>> In theory, any two objects could share a cache line. We can't just stop =
all=0A=
>> memory accesses from CPU while a peripheral is busy.=0A=
> =0A=
> The user obviously can't touch the memory areas potentially under=0A=
> DMA.  But in this case it's not the user that's doing it, it's=0A=
> the driver.=0A=
> =0A=
> So the driver must not touch any virtual pointers given to it=0A=
> as input/output while the DMA areas are mapped.=0A=
> =0A=
Driver is not touching the DMA mapped areas, the DMA API conventions are=0A=
carefully followed.=0A=
It's touching a virtual pointer that is not DMA mapped, that just happens t=
o be=0A=
on the same cache line with a DMA mapped buffer.=0A=
=0A=
Thanks,=0A=
Horia=0A=