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[209.132.180.67]) by mx.google.com with ESMTP id h185si7081931pge.199.2019.08.31.08.31.02; Sat, 31 Aug 2019 08:31:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dvJE82KF; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727915AbfHaP3p (ORCPT + 99 others); Sat, 31 Aug 2019 11:29:45 -0400 Received: from mail-wr1-f42.google.com ([209.85.221.42]:46000 "EHLO mail-wr1-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726705AbfHaP3p (ORCPT ); Sat, 31 Aug 2019 11:29:45 -0400 Received: by mail-wr1-f42.google.com with SMTP id q12so9727406wrj.12 for ; Sat, 31 Aug 2019 08:29:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=8uBJCRzjM8Or1WLuVheV+xTYWNDbhaPFMHVOz+O85Ho=; b=dvJE82KFRWMV41gmHx8YD2y5CkBf5jX2oviEMJo7yvHA3EHOCRO9zaKY5lSahEYTLF sA7JEAqFUBkSoPV7j+x3iXG2+LxeRSIwG29g/++HzU8awOb5BI7c5hTCDDg2Gf+cr44x JVpoWlGTvlQIKptxVUeXPEqXMM1xUpUyzy73ZkWukpmVq2rJTaVkXcrXHtKitj6rRMqY 21tM4HdAsTIcZamJ9EwV8sJc2dbcxh4lu5TIR05VgC6vRcuPVD5w16RmlYQyje1fm0hV yBVd/KWXQ8tpBOkT/zl1z5AhxaBAldK4cWUQB86rM+QL1B4X8n1FByKKIoRgdH41PcPb X3mA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=8uBJCRzjM8Or1WLuVheV+xTYWNDbhaPFMHVOz+O85Ho=; b=J7GLRY3G5QM7UZ6qnzycNgfcfeBUJRgrUq5LECCUdWWZIakGLGlRLD7JzVOS2UkGfq ErQAapVYcDp/nJ7AWonD95PXVADsBv35J6V8mx4+imezzspAT8Fqm9Md4ViMNGfVJ217 RcQQNPFjMWuh+ysNGCIlGx5xtwYV6vCt87RuG973gAj5V14KgdBfiPnyOS/okcv/SYSI ml4jwXf8FlJJTFDsFUY8re1Kz9KGdV0kbZSXKelqbrdumBhRSyf4P1J9ghO51ab3OpvG TjX0uS7srRGiRCsAY0mCsdGKQJzOSJ+4Z41TiKEm4lccmCRLuZW3ehkYxcHVowsopS2I YZig== X-Gm-Message-State: APjAAAXSsuGiiFxkaFRl3GlHQoAFY3BeHNASMmqAV4nybdW+OaT7LICx c9L7odu0gsg0ixw8Jm3rxlLgYjr14WhJDzxaJtUrDQ== X-Received: by 2002:a05:6000:128d:: with SMTP id f13mr25943128wrx.241.1567265383460; Sat, 31 Aug 2019 08:29:43 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Ard Biesheuvel Date: Sat, 31 Aug 2019 18:29:32 +0300 Message-ID: Subject: Re: cbc mode broken in rk3288 driver To: Elon Zhang Cc: "open list:HARDWARE RANDOM NUMBER GENERATOR CORE" , Herbert Xu , Eric Biggers Content-Type: text/plain; charset="UTF-8" Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On Fri, 23 Aug 2019 at 11:21, Elon Zhang wrote: > > > On 8/23/2019 15:33, Ard Biesheuvel wrote: > > On Fri, 23 Aug 2019 at 10:10, Elon Zhang wrote: > >> Hi Ard, > >> > >> I will try to fix this bug. > > Good > > > >> Furthermore, I will submit a patch to set > >> crypto node default disable in rk3288.dtsi. > >> > > Please don't. The ecb mode works fine, and 'fixing' the DT only helps > > if you use the one that ships with the kernel, which is not always the > > case. > > > But crypto node default 'okay' in SoC dtsi is not good since not all > boards need this > > hardware function. It is better that default 'disbale' in SoC dtsi and > enabled in specific > > board dts. > It is not a property of the board whether the crypto accelerator is needed or not, it is a property of the use case in which the board is being put to use. Pretending a h/w block does not exist just because the Linux driver is broken is not the way to fix this. Disable the driver as long as it is broken, and re-enable it once it is fixed. And please don't touch the dts - it describes the hardware, not the software.