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[209.132.180.67]) by mx.google.com with ESMTP id ay1si10187516plb.83.2019.09.08.05.51.53; Sun, 08 Sep 2019 05:52:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=FjTCr5v8; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729532AbfIGRyM (ORCPT + 99 others); Sat, 7 Sep 2019 13:54:12 -0400 Received: from mail-wm1-f65.google.com ([209.85.128.65]:52487 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726462AbfIGRyM (ORCPT ); Sat, 7 Sep 2019 13:54:12 -0400 Received: by mail-wm1-f65.google.com with SMTP id t17so9535141wmi.2; Sat, 07 Sep 2019 10:54:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=hiUXBkiQbc16IdopYPDPirbBRyqBVObPwXAlnyGJKFM=; b=FjTCr5v8LuQgVVNsuDdiwTTeimQZm0P9jI5mkwRE55/MwI5OMxqV6tDISyp8Ghxtfv cICzYY9w8DsHGC4tCzwWzzPZ4oDJhTeuu0PaD+YqSugVSapkGnyeEDiJXo3Np9ao5f5Y kVYGYcbLkRQ5rNx7ADwCHab6WWS55lPJ0VnGYaSsGWu5urDfuWxojP3ej/bv4eSWPEXQ Pnx+PmVCC7CULc+68zAoxNW128zHZqkMAMlj/OEVNrjPg+KwD4hLWvyGRRHr6dOC3fUL y7+JvbDH66lW/Vb9o9IXS07zUkYyfagHelRqbL77GJugZIRVueMOGqvEEX7/DNSZDTBa pJbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=hiUXBkiQbc16IdopYPDPirbBRyqBVObPwXAlnyGJKFM=; b=SO3DUcWTHW3h1qR/EwfXWnzhNqXvDgXkcExLgbM/w8YTsp0nzX/nt2GAHtmwM81O4y wIDGqSCuu1ywkOR7rQRO7ANX0qIAbvQv7bGyT689tv4nZLcwmcWqv3RD05fbQXf1ivyS JrnC1z36Qxx4YxZfzduD/T8WbUtLrF2Ngy+z/tC4cYfLNLhKQsSJIrvWxTecetlcy1nJ uCDm5zOT+I1JJCI46ol5p21Lw0q8Eln0bI78weHC0yXgHX+YC29+NCMuSjbQiTmRZc9d RFutNMsjbPiQ6Vq/x3Dl4b2/V1jjUqYbFh6vya41BLscHyey6jnUDu+im32Dwfs8yOnf /RlA== X-Gm-Message-State: APjAAAVEtkOvTRzFS0zAQaWkRBSEgI84Ne+DhGvJiEJo0cwXm6ZU7+M9 psXSxeF6kLKJoTCik6bLGAo= X-Received: by 2002:a1c:7c15:: with SMTP id x21mr13095007wmc.154.1567878849794; Sat, 07 Sep 2019 10:54:09 -0700 (PDT) Received: from Red ([2a01:cb1d:147:7200:2e56:dcff:fed2:c6d6]) by smtp.googlemail.com with ESMTPSA id b194sm20110217wmg.46.2019.09.07.10.54.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 07 Sep 2019 10:54:09 -0700 (PDT) Date: Sat, 7 Sep 2019 19:54:07 +0200 From: Corentin Labbe To: Maxime Ripard Cc: davem@davemloft.net, herbert@gondor.apana.org.au, linux@armlinux.org.uk, mark.rutland@arm.com, robh+dt@kernel.org, wens@csie.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: Re: [PATCH 4/9] ARM: dts: sun8i: r40: add crypto engine node Message-ID: <20190907175407.GB2628@Red> References: <20190906184551.17858-1-clabbe.montjoie@gmail.com> <20190906184551.17858-5-clabbe.montjoie@gmail.com> <20190907040217.kzvq7gfxz67pluhz@flea> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190907040217.kzvq7gfxz67pluhz@flea> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On Sat, Sep 07, 2019 at 07:02:17AM +0300, Maxime Ripard wrote: > On Fri, Sep 06, 2019 at 08:45:46PM +0200, Corentin Labbe wrote: > > The Crypto Engine is a hardware cryptographic offloader that supports > > many algorithms. > > It could be found on most Allwinner SoCs. > > > > This patch enables the Crypto Engine on the Allwinner R40 SoC Device-tree. > > > > Signed-off-by: Corentin Labbe > > --- > > arch/arm/boot/dts/sun8i-r40.dtsi | 11 +++++++++++ > > 1 file changed, 11 insertions(+) > > > > diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi > > index bde068111b85..7eb649cea163 100644 > > --- a/arch/arm/boot/dts/sun8i-r40.dtsi > > +++ b/arch/arm/boot/dts/sun8i-r40.dtsi > > @@ -266,6 +266,17 @@ > > #phy-cells = <1>; > > }; > > > > + crypto: crypto-engine@1c15000 { > > + compatible = "allwinner,sun8i-r40-crypto"; > > + reg = <0x01c15000 0x1000>; > > + interrupts = ; > > + clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>; > > + clock-names = "ahb", "mod"; > > + resets = <&ccu RST_BUS_CE>; > > + reset-names = "ahb"; > > + status = "okay"; > > The driver will probe if status is not declared, so if you want it > always enabled you should simply remove status > Fixed, thanks.