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Date:   Tue, 1 Oct 2019 23:07:53 +1000
From:   Herbert Xu <herbert@gondor.apana.org.au>
To:     Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc:     linux-crypto@vger.kernel.org,
        Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: Re: [PATCH 1/2] crypto: arm/aes-ce - build for v8 architecture
 explicitly
Message-ID: <20191001130753.GA3434@gondor.apana.org.au>
References: <20190917085001.792-1-ard.biesheuvel@arm.com>
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On Tue, Sep 17, 2019 at 09:50:00AM +0100, Ard Biesheuvel wrote:
> From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> 
> The NEON/Crypto Extensions based AES implementation for 32-bit ARM
> can be built in a kernel that targets ARMv6 CPUs and higher, even
> though the actual code will not be able to run on that generation,
> but it allows for a portable image to be generated that can will
> use the special instructions only when they are available.
> 
> Since those instructions are part of a FPU profile rather than a
> CPU profile, we don't override the architecture in the assembler
> code, and most of the scalar code is simple enough to be ARMv6
> compatible. However, that changes with commit c61b1607ed4fbbf2,
> which introduces calls to the movw/movt instructions, which are
> v7+ only.
> 
> So override the architecture in the .S file to armv8-a, which
> matches the architecture specification in the crypto-neon-fp-armv8
> FPU specificier that we already using. Note that using armv7-a
> here may trigger an issue with the upcoming Clang 10 release,
> which no longer permits .arch/.fpu combinations it views as
> incompatible.
> 
> Reported-by: kbuild test robot <lkp@intel.com>
> Fixes: c61b1607ed4fbbf2("crypto: arm/aes-ce - implement ciphertext stealing ...")
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
>  arch/arm/crypto/aes-ce-core.S | 1 +
>  1 file changed, 1 insertion(+)

All applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
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