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From:   Horia Geanta <horia.geanta@nxp.com>
To:     Andrey Smirnov <andrew.smirnov@gmail.com>,
        "linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>
CC:     Chris Healy <cphealy@gmail.com>,
        Lucas Stach <l.stach@pengutronix.de>,
        Herbert Xu <herbert@gondor.apana.org.au>,
        Iuliana Prodan <iuliana.prodan@nxp.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        dl-linux-imx <linux-imx@nxp.com>
Subject: Re: [PATCH v5 0/4] enable CAAM's HWRNG as default
Thread-Topic: [PATCH v5 0/4] enable CAAM's HWRNG as default
Thread-Index: AQHVqfYbrp2ap031c0mfNElXDRWd5w==
Date:   Mon, 9 Dec 2019 15:44:15 +0000
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References: <20191203162357.21942-1-andrew.smirnov@gmail.com>
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On 12/3/2019 6:24 PM, Andrey Smirnov wrote:=0A=
> Everyone:=0A=
> =0A=
> This series is a continuation of original [discussion]. I don't know=0A=
> if what's in the series is enough to use CAAMs HWRNG system wide, but=0A=
> I am hoping that with enough iterations and feedback it will be.=0A=
> =0A=
> Changes since [v1]:=0A=
> =0A=
>     - Original hw_random replaced with the one using output of TRNG direc=
tly=0A=
> =0A=
>     - SEC4 DRNG IP block exposed via crypto API=0A=
> =0A=
>     - Small fix regarding use of GFP_DMA added to the series=0A=
> =0A=
> Chagnes since [v2]:=0A=
> =0A=
>     - msleep in polling loop to avoid wasting CPU cycles=0A=
> =0A=
>     - caam_trng_read() bails out early if 'wait' is set to 'false'=0A=
> =0A=
>     - fixed typo in ZII's name=0A=
> =0A=
> Changes since [v3]:=0A=
> =0A=
>     - DRNG's .cra_name is now "stdrng"=0A=
> =0A=
>     - collected Reviewd-by tag from Lucas=0A=
> =0A=
>     - typo fixes in commit messages of the series=0A=
> =0A=
> Changes since [v4]:=0A=
> =0A=
>     - Dropped "crypto: caam - RNG4 TRNG errata" and "crypto: caam -=0A=
>       enable prediction resistance in HRWNG" to limit the scope of the=0A=
>       series. Those two patches are not yet ready and can be submitted=0A=
>       separately later.=0A=
> =0A=
I don't agree with dropping the Job Ring Interface (JRI) in favor of=0A=
using TRNG registers directly - for the purpose of extracting entropy.=0A=
=0A=
One of the reasons is that TRNG registers are part of page 0,=0A=
which is not accessible in the Linux kernel in some cases.=0A=
=0A=
It's possible to use JRI for extracting entropy following these steps:=0A=
=0A=
1. Instantiate RNG state handle with Prediction Resistance (PR) support=0A=
This is optional in cases when page 0 is not under kernel's control.=0A=
We'll separately modify SW controlling page 0 to offer PR support.=0A=
=0A=
2. For each hwrng read(), enqueue via JRI one or more job descriptors (JD)=
=0A=
having the PR bit set in the ALGORITHM OPERATION command.=0A=
=0A=
Note that according to hwrng API, it's ok to *partially* fulfill the reques=
t:=0A=
 * @read:		New API. drivers can fill up to max bytes of data=0A=
 *			into the buffer. The buffer is aligned for any type=0A=
 *			and max is a multiple of 4 and >=3D 32 bytes.=0A=
=0A=
It's important to limit the output of each JD, such that the recommendation=
=0A=
in SP800-90C (section "9.4 The Oversampling-NRBG Construction") is followed=
:=0A=
https://csrc.nist.gov/CSRC/media/Publications/sp/800-90c/draft/documents/sp=
800_90c_second_draft.pdf=0A=
=0A=
For CAAM RNG4, the DRBG security strength is s =3D 256 bits (32 bytes),=0A=
thus each JD must extract at most s/2 - 128 bits (16 bytes).=0A=
=0A=
Similar to what's being done for TRNG registers-based implementation,=0A=
some back-off mechanism is needed, such that DECO won't stall=0A=
waiting for the TRNG.=0A=
This is important on i.MX platforms where there's a single DECO=0A=
(on PPC & Layerscape platforms there are multiple DECOs).=0A=
=0A=
Horia=0A=