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From:   Adam Ford <aford173@gmail.com>
Date:   Wed, 1 Jan 2020 16:41:26 -0600
Message-ID: <CAHCN7xL_jAT4PYtkMXZbBy=VCUyzRqYaCbKs0oi6p297CCiOdg@mail.gmail.com>
Subject: Re: [PATCH 1/2] arm64: dts: imx8mm: Add CAAM node
To:     Michael Trimarchi <michael@amarulasolutions.com>
Cc:     Shawn Guo <shawnguo@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Aymen Sghaier <aymen.sghaier@nxp.com>,
        Herbert Xu <herbert@gondor.apana.org.au>,
        linux-amarula@amarulasolutions.com,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        NXP Linux Team <linux-imx@nxp.com>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        Fabio Estevam <festevam@gmail.com>,
        arm-soc <linux-arm-kernel@lists.infradead.org>,
        linux-crypto@vger.kernel.org
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On Wed, Jan 1, 2020 at 11:50 AM Michael Trimarchi
<michael@amarulasolutions.com> wrote:
>
> Add node for CAAM - Cryptographic Acceleration and Assurance Module.
>

I believe a series similar to this was already done and applied:

https://patchwork.kernel.org/patch/11300663/

adam

> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mm.dtsi | 31 +++++++++++++++++++++++
>  1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 7360dc0685eb..428a8b43086e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -667,6 +667,37 @@
>                                 status = "disabled";
>                         };
>
> +                       crypto: crypto@30900000 {
> +                               compatible = "fsl,sec-v4.0";
> +                               #address-cells = <1>;
> +                               #size-cells = <1>;
> +                               reg = <0x30900000 0x40000>;
> +                               ranges = <0 0x30900000 0x40000>;
> +                               interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
> +                               clocks = <&clk IMX8MM_CLK_AHB>,
> +                                        <&clk IMX8MM_CLK_IPG_ROOT>;
> +                               clock-names = "aclk", "ipg";
> +                               status = "disabled";
> +
> +                               sec_jr0: jr0@1000 {
> +                                        compatible = "fsl,sec-v4.0-job-ring";
> +                                        reg = <0x1000 0x1000>;
> +                                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> +                               };
> +
> +                               sec_jr1: jr1@2000 {
> +                                        compatible = "fsl,sec-v4.0-job-ring";
> +                                        reg = <0x2000 0x1000>;
> +                                        interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> +                               };
> +
> +                               sec_jr2: jr2@3000 {
> +                                        compatible = "fsl,sec-v4.0-job-ring";
> +                                        reg = <0x3000 0x1000>;
> +                                        interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
> +                               };
> +                       };
> +
>                         i2c1: i2c@30a20000 {
>                                 compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c";
>                                 #address-cells = <1>;
> --
> 2.17.1
>
>
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