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Subject: Re: [PATCH v10 0/4] Add uacce module for Accelerator
To:     Jonathan Cameron <Jonathan.Cameron@Huawei.com>,
        Zhangfei Gao <zhangfei.gao@linaro.org>
Cc:     Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Arnd Bergmann <arnd@arndb.de>,
        Herbert Xu <herbert@gondor.apana.org.au>, grant.likely@arm.com,
        jean-philippe <jean-philippe@linaro.org>,
        Jerome Glisse <jglisse@redhat.com>,
        ilias.apalodimas@linaro.org, francois.ozog@linaro.org,
        kenneth-lee-2012@foxmail.com, Wangzhou <wangzhou1@hisilicon.com>,
        "haojian . zhuang" <haojian.zhuang@linaro.org>,
        guodong.xu@linaro.org, linux-accelerators@lists.ozlabs.org,
        linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org,
        iommu@lists.linux-foundation.org, Dave Jiang <dave.jiang@intel.com>
References: <1576465697-27946-1-git-send-email-zhangfei.gao@linaro.org>
 <20200109174952.000051e1@Huawei.com>
From:   zhangfei <zhangfei.gao@linaro.org>
Message-ID: <9b87edca-dd4e-3fe2-5acd-11f7381593ed@linaro.org>
Date:   Fri, 10 Jan 2020 15:03:25 +0800
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On 2020/1/10 上午1:49, Jonathan Cameron wrote:
> On Mon, 16 Dec 2019 11:08:13 +0800
> Zhangfei Gao <zhangfei.gao@linaro.org> wrote:
>
>> Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
>> provide Shared Virtual Addressing (SVA) between accelerators and processes.
>> So accelerator can access any data structure of the main cpu.
>> This differs from the data sharing between cpu and io device, which share
>> data content rather than address.
>> Because of unified address, hardware and user space of process can share
>> the same virtual address in the communication.
>>
>> Uacce is intended to be used with Jean Philippe Brucker's SVA
>> patchset[1], which enables IO side page fault and PASID support.
>> We have keep verifying with Jean's sva patchset [2]
>> We also keep verifying with Eric's SMMUv3 Nested Stage patches [3]
> Hi Zhangfei Gao,
>
> Just to check my understanding...
>
> This patch set is not dependent on either 2 or 3?
>
> To use it on our hardware, we need 2, but the interfaces used are already
> upstream, so this could move forwards in parallel.
>
>
Yes,
patch 1, 2 is for uacce.
patch 3, 4 is an example using uacce, which happen to be crypto.

Thanks