Received: by 2002:a25:1506:0:0:0:0:0 with SMTP id 6csp3069766ybv; Sun, 9 Feb 2020 14:39:25 -0800 (PST) X-Google-Smtp-Source: APXvYqy4EjzrP2wdwuJVcZZ3ALqI2h1q2iHstA14AhaZXMBM5GyVfSMhmd1WXiluluo/l+OMVjZW X-Received: by 2002:a9d:4c06:: with SMTP id l6mr8309252otf.161.1581287965581; Sun, 09 Feb 2020 14:39:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1581287965; cv=none; d=google.com; s=arc-20160816; b=zn6r7zH4JA/UEag3+OUNfZhK+JaTOqvNCdBgVmbJxbZ0T+s7976UlGWHUkHtXSNHDq MDnOjcNMrqOBdBE9CO/3RMxld0v0OT8202qlOm0labvzLw/T9q4sM1bBcDeZ6HIL0hsO ZcY2zujKXNTyPq1d5zaGSxwe67DdQisI9ONGn8W7kAvipGfnydCDRWXc5bqhpS+XXnkl WKI6bPoTJYaygkCW7ckXvoZAMr1NNEY9FB4DQWl/UgC3MpQI8qma2tRCp/cn/tLYHFTx Lrdncgrw6V6kbFBoRUh+Uho8W5FHm1i0Naf02hr8eH7EIfrimYsg8qm1Sbig448oz8vz REMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-transfer-encoding:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=viMGruOG1jCZUXMu+S3mzXnhGnr2IgHNYMxCSKKh4Nc=; b=oH6nCyOn/Ma0G0s+Z92FC/QI11NP07wr2pxDomJoWyF513lPIx6/9CXTKzIQo4noVt yWM6xrBP93GKvk0jzVKjujT5HncQ8a6ijg+7Iw+UXFS0WsWXuVVXDJLsLqRawkB9r+wA ISlKiHoYilqlMZG47GDNlXt01O+YmYGju80kL08ZVuIrOXRx9AiXkn5jQOxMbLTOQhbI fe+fotka3tH4N5wxhjF5OKis4z0HKMgO0IgU1yd8nDg6BPQSvuWL5Mv8miI2NxgoOaUF yRltC5XXsaEArVb1AEfGgotDT80e5iZkYjMmhMfstomfiT9orvlyM0FrksyuAOZJfNV9 3oPQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=LIIgNjiU; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p83si7572468oih.198.2020.02.09.14.39.02; Sun, 09 Feb 2020 14:39:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=LIIgNjiU; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726915AbgBIWim (ORCPT + 99 others); Sun, 9 Feb 2020 17:38:42 -0500 Received: from mail-pg1-f194.google.com ([209.85.215.194]:39256 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726890AbgBIWil (ORCPT ); Sun, 9 Feb 2020 17:38:41 -0500 Received: by mail-pg1-f194.google.com with SMTP id j15so2861699pgm.6; Sun, 09 Feb 2020 14:38:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to :user-agent; bh=viMGruOG1jCZUXMu+S3mzXnhGnr2IgHNYMxCSKKh4Nc=; b=LIIgNjiUgKkKaVVXHKRdajm65ZvbHkrCZa4bMUEmHrcgUFP4tHshvkJ840Dc4J/zan BMxHWABfZY6hTxS3wHQ65RmMijAgW2gPoIxnVOaNmNBpPnuTSXbOvXa1PEFJsrZ/yaK+ 3naQUyt84xVoah8HXzI5dYgpgv31UKtjWsbnn3bv4Pt2vWwCen6mw4hZ/VTKIJDp2t2e otIN3pfJbu/6OA+m5pn2o11Q1yEy6dYZuYMFt51dAQhDY0Ury6zwyoZa9e+3WvquVFhw qrzbv5yfhEQJM1Xv63iTbgmpZWcPukkBkwUcUT059m5GcA0/ttpob3ZF9AP9d6gvCpqh 308A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to:user-agent; bh=viMGruOG1jCZUXMu+S3mzXnhGnr2IgHNYMxCSKKh4Nc=; b=ed9YHpH1gt9M4fjkNTOwq91mIGR402P3gzfb8KtdFVcAKglChh5uNbAodwSaWIY758 HSOb7JiVQA/CdFXI8m/QkuDTGIGMNuWT8kljBjEcUsfpPKLvCqgjWKrLSrsySQvkbTQo OwwKBXUPTGzmHqxZCJR6cQgT845JckO1ynG1SJZ5gbuv9xMhZHKGkPRWVfGr/gBT445T hDjhlbZn2Su83P7ExiAHR14lX+NJAdpvFDjkW7EaRpwML4YfKntVKYNk1sAhLU1dFiAz JT/9/HzYtMCcHGre51GV7jQmSzQoBvgXVR5H1yibPEWaUk74+QGqweAJ02jLW79EoUlP mrYg== X-Gm-Message-State: APjAAAUxJTK850uKfpdbfgGztKOoIovj1r/ulxIeq/+sHEdiAE4IA0VA zpjMnMT6pkG8GV0u3XwA4O4= X-Received: by 2002:aa7:86c2:: with SMTP id h2mr10045616pfo.45.1581287919219; Sun, 09 Feb 2020 14:38:39 -0800 (PST) Received: from dtor-ws ([2620:15c:202:201:3adc:b08c:7acc:b325]) by smtp.gmail.com with ESMTPSA id 76sm10154918pfx.97.2020.02.09.14.38.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 09 Feb 2020 14:38:38 -0800 (PST) Date: Sun, 9 Feb 2020 14:38:36 -0800 From: Dmitry Torokhov To: Horia Geanta Cc: =?iso-8859-1?Q?Andr=E9?= Draszik , "linux-kernel@vger.kernel.org" , Anson Huang , Aymen Sghaier , Herbert Xu , "David S. Miller" , Rob Herring , Mark Rutland , "linux-crypto@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-input@vger.kernel.org" , Robin Gong , dl-linux-imx Subject: Re: [PATCH 2/3] Input: snvs_pwrkey - enable snvs clock as needed Message-ID: <20200209223836.GA199269@dtor-ws> References: <20200130204516.4760-1-git@andred.net> <20200130204516.4760-2-git@andred.net> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On Fri, Feb 07, 2020 at 08:10:22AM +0000, Horia Geanta wrote: > On 1/30/2020 10:45 PM, André Draszik wrote: > > At the moment, enabling this driver without the SNVS RTC driver > > being active will hang the kernel as soon as the power button > > is pressed. > > > > The reason is that in that case the SNVS isn't enabled, and > > any attempt to read the SNVS registers will simply hang forever. > > > > Ensure the clock is enabled (during the interrupt handler) to > > make this driver work. > > > > Also see commit 7f8993995410 ("drivers/rtc/rtc-snvs: add clock support") > > and commit edb190cb1734 > > ("rtc: snvs: make sure clock is enabled for interrupt handle") > > for similar updates to the snvs rtc driver. > > > > Signed-off-by: André Draszik > > Cc: Anson Huang > > Cc: Dmitry Torokhov > > Cc: "Horia Geantă" > > Cc: Aymen Sghaier > > Cc: Herbert Xu > > Cc: "David S. Miller" > > Cc: Rob Herring > > Cc: Mark Rutland > > Cc: linux-crypto@vger.kernel.org > > Cc: devicetree@vger.kernel.org > > Cc: linux-input@vger.kernel.org > > --- > > drivers/input/keyboard/snvs_pwrkey.c | 27 +++++++++++++++++++++++++++ > > 1 file changed, 27 insertions(+) > > > > diff --git a/drivers/input/keyboard/snvs_pwrkey.c b/drivers/input/keyboard/snvs_pwrkey.c > > index 2f5e3ab5ed63..c29711d8735c 100644 > > --- a/drivers/input/keyboard/snvs_pwrkey.c > > +++ b/drivers/input/keyboard/snvs_pwrkey.c > > @@ -16,6 +16,7 @@ > > #include > > #include > > #include > > +#include > > #include > > #include > > > > @@ -38,6 +39,7 @@ struct pwrkey_drv_data { > > int wakeup; > > struct timer_list check_timer; > > struct input_dev *input; > > + struct clk *clk; > > u8 minor_rev; > > }; > > > > @@ -72,6 +74,9 @@ static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id) > > struct input_dev *input = pdata->input; > > u32 lp_status; > > > > + if (pdata->clk) > > + clk_enable(pdata->clk); > > + > clk framework handles NULL pointers internally, the check is redundant. > > > pm_wakeup_event(input->dev.parent, 0); > > > > regmap_read(pdata->snvs, SNVS_LPSR_REG, &lp_status); > > @@ -96,6 +101,9 @@ static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id) > > /* clear SPO status */ > > regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO); > > > > + if (pdata->clk) > > + clk_disable(pdata->clk); > > + > > return IRQ_HANDLED; > > } > > > > @@ -140,6 +148,25 @@ static int imx_snvs_pwrkey_probe(struct platform_device *pdev) > > if (pdata->irq < 0) > > return -EINVAL; > > > > + pdata->clk = devm_clk_get(&pdev->dev, "snvs-pwrkey"); > > + if (IS_ERR(pdata->clk)) { > > + pdata->clk = NULL; > Using devm_clk_get_optional() would simplify error handling. It sounds to me that this clock is not at all optional and the driver currently "works" only by accident and therefore optional is not suitable here. > > > + } else { > > + error = clk_prepare_enable(pdata->clk); So if you enable clock here and do not disable it, why do you need to enable it again in interrupt? Thanks. -- Dmitry