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Mon, 17 Feb 2020 10:06:48 +0000 From: Kalyani Akula To: Herbert Xu CC: "davem@davemloft.net" , "monstr@seznam.cz" , "linux-crypto@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Rob Herring , "devicetree@vger.kernel.org" , git-dev , Mohan Marutirao Dhanawade , Sarat Chand Savitala , Harsh Jain , Michal Simek , Mohan Marutirao Dhanawade Subject: RE: [PATCH V6 3/4] crypto: Add Xilinx AES driver Thread-Topic: [PATCH V6 3/4] crypto: Add Xilinx AES driver Thread-Index: AQHV1aLi86wN5Of2F06o6+V0ID53EKgY7WuAgAZaW/A= Date: Mon, 17 Feb 2020 10:06:48 +0000 Message-ID: References: <1580192308-10952-1-git-send-email-kalyani.akula@xilinx.com> <1580192308-10952-4-git-send-email-kalyani.akula@xilinx.com> <20200213090241.fksu33yszqi5fjat@gondor.apana.org.au> In-Reply-To: <20200213090241.fksu33yszqi5fjat@gondor.apana.org.au> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=kalyania@xilinx.com; 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x-microsoft-antispam-message-info: GKOWgz67eRTYI0WbH5YVKjLHeumoXJbT3HGeE7y6sx0zLysAkBP5iS89hq0YmJbBeRyY4BecW5J8cyD1Ogtvp/4E4jNrNFhm212MBxy0S2x7StwhK5lb28ptwGydziCmRpG+U/NbpujYUIGrQ9yhavQOMIfzQh57aqbqnAfTGkdhaETG+lOxnCd2kgSeWKxy6OMjrgosRSe5LEoIogJTJdf9bFzsgn+tuSEmrShIezHpZkNLDNJY3fJ2oEZ2bYdpsxgD+YjXq0xIgLiXqpQfkE6R8ZP3E1p/D049+ok8bf4dzIGVB11423JTYCSZMIpBvC9mCy2mo0HkTEcmErvb5r8e4S7M24sYQwOMtAVgzMHC1RHQvrb7FOYQCMyoPu0HrhMlVMWoEx01IJuSqJcK+Lo1Dq5s4YqqQmb7DXguD4F3ag5ujPSKkiO67ghHBGn7woQtrkiYvgswZaOTrp5XaBPF84USqeCxDPZdwQlIDv3HlSVvJ77u5V6XOLsWIm0WuxWOzcgDNcqv1Xn7y7A2zw== x-ms-exchange-antispam-messagedata: 9EHD1GoHYY/baiHOpClhjqXN8qcII/a7ENmb7vZ55FmJ6oBlDmzM9ANrLvnlc+98s3gzpTEIB/eLLcuJYRmmQMzEC5oFNCv6qv8OsrVXA+LhF16SCEyDXXjI8Ux/AbUxWBF9wH4Ak1nMUXNDEx1N3g== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-Network-Message-Id: ecef6143-25ad-496e-391d-08d7b3911a24 X-MS-Exchange-CrossTenant-originalarrivaltime: 17 Feb 2020 10:06:48.5656 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: UOgwaNKfpXc/37iNl2igbl6VvWeUhZLprXEI3+JJkL5j4ez0j6O/SNXwREiPNO5s0zeF9rrGsAadfl741/XmxA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PR02MB4242 Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Hi Herbert, The compilation issue is due to commit af5034e8e4a5 ("crypto: remove propag= ation of CRYPTO_TFM_RES_* flags "). I will fix it and send V7. Regards, Kalyani > -----Original Message----- > From: Herbert Xu > Sent: Thursday, February 13, 2020 2:33 PM > To: Kalyani Akula > Cc: davem@davemloft.net; monstr@seznam.cz; linux-crypto@vger.kernel.org; > linux-kernel@vger.kernel.org; Rob Herring ; > devicetree@vger.kernel.org; git-dev ; Mohan Marutirao > Dhanawade ; Sarat Chand Savitala > ; Harsh Jain ; Michal Simek > ; Kalyani Akula ; Mohan Marutira= o > Dhanawade > Subject: Re: [PATCH V6 3/4] crypto: Add Xilinx AES driver >=20 > On Tue, Jan 28, 2020 at 11:48:27AM +0530, Kalyani Akula wrote: > > This patch adds AES driver support for the Xilinx ZynqMP SoC. > > > > Signed-off-by: Mohan Marutirao Dhanawade > > > Signed-off-by: Kalyani Akula > > Acked-by: Michal Simek > > --- > > > > V5 Changes: > > - Replaced ARCH_ZYNQMP with ZYNQMP_FIRMWARE in Kconfig > > - Removed extra new lines. > > - Moved crypto: Add Xilinx AES driver patch from 4/4 to 3/4. > > - Updated Signed-off-by sequence. >=20 > Sorry but this patch doesn't compile against the current cryptodev tree. = Please > fix and respost. >=20 > Thanks, > -- > Email: Herbert Xu Home Page: > http://gondor.apana.org.au/~herbert/ > PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt